Arcam-P1-pwr-sm维修电路原理图.pdf
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1、Service Manual P1 Ampli er Issue 1.0 ARCAMARCAM Bringing music the selection between the two input options is accomplished by SW100. The selected signal is clamped +/- 5v3 by the series Zeners at location DZ103 and DZ104 this is to prevent damage to the input of op-amp IC200, due to leaky source sig
2、nal or electrostatic discharges. SW101 allows for the selection of two gain settings these are 28.3 for “THX” and 37.5 for the Arcam setting. The roll off setting is 340Khz. The main power amplifier circuit is a classic current feed-back design and can be thought of as a large current feed-back op-a
3、mp the topology is a refined high power output variant of the A90/P7 design. Op-amp IC101 is configured as a non-inverting amplifier with a gain of 2. Its purpose is to provide current outputs (via its own power supply pins) and a current input via its output pin, the Op-amp performs the voltage to
4、current conversion (I-V) and phase splitting necessary to drive the voltage gain stage. The current feed-back occurs because the output of IC101 drives into a 44 ohm load formed by the two 22 ohm resistors R142 and R143 down to ground, the power Cont/ supply pin currents are half wave-rectified vers
5、ions of the drive current of the amplifier. This causes the voltage gain, which is buffered and passed on to the outputs. The feedback from pin 1 of IC101 acts to reduce the gain of the amplifier; when this current is roughly equal to the current required to drive the input signal into 44-ohms equil
6、ibrium is reached and the closed loop gain is defined. The output stage provides the vast majority of the current required to drive the 44-ohm load. The op-amp only needs to provide a very small error current to give the required voltage magnification. Transistors TR101 and TR116 are common base amp
7、lifiers their purpose is to provide the +/- 15v rails necessary to drive the op-amp whilst allowing the power supply currents that are drawn to pass through into the Wilson current mirror stage, this is formed by PNP transistors TR102, TR104 and TR122 the NPN mirror is formed by TR115, TR117 and TR1
8、22. TR103 combines the two current mirrors to provide a very high-gain current to voltage (transresistance) gain stage roughly 80dB at low frequency C114 and C132 with R149, R150 combine to give a open-loop pole at roughly 10Khz and a corresponding open-loop zero around 500Khz. This allows for good
9、time domain performance and clean square wave reproduction with no sign of ringing or overshoot. Diodes D100 and D101 act to limit the current through TR115 and TR112, if the input current exceeds 14mA the diodes conduct and the transresistance stage becomes a constant current source killing the ope
10、n loop gain and preventing damage to the transistors. IC101 forms a D.C intergrating servo. Its purpose is to remove residual D.C errors due to slight device mismatch and component tolerances. It is configured as an inverting intergrator with a time constant of 0.5 seconds. Any D.C offset at the out
11、put of the amplifier will cause the output if the op-amp to go negative increasing the current in the negative supply pin and thus pulling the output down to ground (and vica versa). D108 protects the inverting input of the op-amp under fault condition. TR103 provides a 4.7v bias voltage to allow th
12、e following pre-driver stage to operate in Class A. TR123 and TR125 form a Class A pre-driver emitter follower stage to boost the current gain and isolate the transresistance stage from the output transistors. TR105 and TR118 act as a 30mA current limit and prevent the destruction of TR123 and TR125
13、 under a fault condition. R109, R164, R110 and R165 loosely decouple the emitters of TR123 and TR125 from the output stage. TR128, TR129 and TR126, TR127 are Sanken SAP 15N and SAP 15P Bi-polar output drivers RV100 is the Bias adjust preset D104 protect the Output drivers from destruction if RV100 g
14、oes open circuit. C144 to C147 provide local R.F stability and prevent oscillation. D111 and D112 are catch diodes to reduce the effects of back-EMF from the loudspeaker coils/load. R164, R183, C150 and L100 form the Zobel network, these components ensure that the amplifier sees a constant load of 4
15、.7 ohms at high at very high frequencies and improve stability reduce H.F noise. L100 and R183 decouple the load at high frequencies to ensure amplifier stability into capacitive loads. SAP 15NY SAP 15PY S-E 0.22 Ohm SAP Under output driver failure conditions the 0.22 internal emitter resistor will
16、usually go open, the resistor should be measured between pins S and E. Protection circuit block The P1 Power amplifier incorporates 4 modes of protection these are as follows. o Instantaneous VI current limiting. o D.C offset protection. o Over-Temperature. o Insulation failure. The VI current limit
17、 circuit is built around TR106 and TR119 they sense the voltage across the 0.22-emitter resistors (hence emitter current) and the collector emitter current or device power dissipation exceeds a preset limit. The circuit is designed to allow large unrestricted currents into loads of 3 ohms and above
18、but limit the current into a short circuit or very low impedance loads. C141, C142 and R162, R163 form a 2.2ms time constant, which will allow larger transients of current delivery for a few milliseconds, to ensure that the amplifier has a sufficiently large transient capability to drive “difficult”
19、 loudspeaker loads. TR106 senses positive current surges and TR119 senses negative surges these intern activate TR107 and switch the optocoupler OPTO100A this fault notification is sent to the microcontroller and the output relay is switched off to protect the amplifier/loudspeaker coils. The t s( )
20、-10.7wiil inten (s)-1237witcsT107 and TR109oan in Test Specification Frequency response. 8-ohm load Input set to 1v rms 20Hz 20kHz = +/- 0.5 dB. Distortion. THD+N 0dBR 4-ohm load. Input set to 1v rms. 20Hz 20Khz = 0.02% Maximum output into an 8-ohm load. Input level set to 1.34 rms 1Khz = 180 watts
21、distortion should be below 0.05% THD+N Bias setting notes The bias of the P1 is set using an Audio precision audio analysis package and we calibrate the power stage for minimum THD the bench set up procedure follows. o Set the input signal to 150mv rms, frequency to 10kHz. Induce a 4-ohm load at the
22、 speaker output. o Rotate preset RV100 clockwise and observe that the THD falls. Continue to rotate the preset until the THD falls to a minimum level and just starts to clime again. o Switch input signal off and allow the amplifier the Quiesce +30secs o Measure the bias level at test point Con 103 (
23、Bias read) and confirm the reading is below the absolute max of 35mV. Major component identification. FMMT 497/597 BC849/BC859 1=Base 2=Emitte -23.2( -23.2()-11.6( -11.6( -11.6T)210.2L)-8.6O)2.5(73)11.82e ( )?T?ET?q?5990265 0 0521.32 38042 341.32 cm?/I42 Do?Q?BT?11.2584 0 0 11.28 439.56 341.32 Tm?0
24、Tc?( )Tj?15.5824 -0.9149 TD?( )Tj?0 -1.1489 TD?( )Tj09 -1.1596 TD?( )Tj?0 -1.1489 TD?( )Tj09 -100759 TD?-0.0074 Tc?( ( )-10.7( )?T?/TT2 1 Tf?10.3576 0 0 10.3772 8)8. ?332886 Tm?0.0174 Tc?SSs2143 ISSUE DRAWING NO. DRAWING TITLE DATE Filename: ECO No.DESCRIPTION OF CHANGE L929CT_1.0.sch P35 / P1 Switc
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