Pass-Aleph0-pwr-sm维修电路原理图.pdf

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1、Aleph 0s Service Manual Version 1.0 - 1.3 PRODUCT DESCRIPTION The Aleph 0s is a high performance Mosfet single-ended Class A stereo audio power amplifier, intended for maximum performance in reproduction of music. It is a simple design, having only three gain stages: input differential pair, cascode

2、d voltage gain stage, and output followers. All three gain stages are biased by constant current sources from the negative supply. The output stage will operate as a single ended class A system at lower power levels and will operate as a push-pull class A system at levels above the bias point of the

3、 constant current source. SIMPLIFIED SCHEMATIC To best understand the operation of the amplifier, refer to the simplified schematic Figure 1. The front end of the amplifier accepts a balanced or unbalanced input signal at two N channel Mosfets operating as a differential pair. They are provided with

4、 bias by a current source from the negative rail which operates at a constant 8 milliamps. The output of the differential pair drives a P channel Mosfet which provides voltage and current gain. At the output of this second stage you will see the full voltage swing of the amplifier. This second gain

5、stage is provided with a single-ended Class A current bias from another current source from the negative supply which provides a constant 30 milliamps current. Between the current source and the drain of the P channel device is a constant voltage source which is used to provide voltage bias to the o

6、utput Mosfet transistors. The amplifier has complementary N and P channel output transistors operated as source followers, so that they provide only current gain. High current single ended Class A bias is provided by yet another constant current source from the negative supply. This current source p

7、rovides greater than 1 amp of constant current per channel COMPLETE SCHEMATIC For purposes of clarity and simplicity, the complete schematic of the Aleph 0s is broken up into the following sections: Power supply, Front end, and Output Stage. Figure 2 shows the power supply schematic. An IEC standard

8、 AC line connector connects to the primary of a toroidal power transformer through an inrush suppression thermistor, fast blow fuse, a power switch, and a thermostat. Fig 2 shows the transformer wired for 120 VAC, and the transformer can be adapted to 240 VAC by connecting the two primary windings i

9、n series. 100 volt operation requires a special transformer. The secondary system consists of a bridge rectifier and four 31,000 uF capacitors. The secondary DC voltage is approximately plus and minus 40 volts. The front end circuitry of the amplifier is decoupled from the main supply by RC filters.

10、 Figure 3 shows one half of the output stage. Both halves run exactly in parallel. RadioFans.CN 收音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 9.1V Z202 9.1V Z201 R201 221 221 R202 R207 .33 R208 .33 Q203 IRF9240 IRF244 Q201 221 R204 Q204 MPSA42 221 R203 1.3 R206 Q202 IRF244 G S D R205 47

11、.5K 4.7 C201 PL10OS10.S01 V+ 10/10/93PASS ALEPH 0S OUTPUT STAGE (1/2) -D ISD +D OUT V- ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename RadioFans.CN 收音机爱 好者资料库 Following are the front end circuits and PC board component placements for Revision numbers 1.0 through 1.3.

12、All are very similar, and while the following description applies specifically to Rev 1.0, the comments apply to all versions. The circuit formed by Q101, Z102, R108 and R107 is a constant current source designed to bias Z101, the voltage reference for the front end constant current sources, and Q7,

13、 the voltage gain stage cascode transistor. This current source and reference circuit is common to both channels. Further references are to each channel singly, with both channels having identical circuits and part references. Q3 and Q4 are constant current sources which bias the front end. They are

14、 driven by Z101 at 9.1 volts, resulting in approximately 4.5 volts across their source resistors, R3 and R10, giving approximately 8 ma and 30 ma constant current. The input differential transistors Q1 and Q2 are power Mosfet transistors which have been matched to .01 volts threshold voltages at 4 m

15、illiamps current. The gates of these devices are connected to differential networks formed by R5, 6, 13-18. These form a true differential amplifier for balanced input and can be operated unbalanced by simply driving the positive input (XLR pin 2) with or without shorting the negative input (XLR pin

16、 3) to ground. Shorting the negative input to ground provides twice the voltage gain over leaving it unterminated, but either method of operation is acceptable. Zener diodes Z1 and 2 protect the input transistors from outside transient voltages. Q1 drives Q6 in common source mode which is in cascode

17、 (common gate) connection with Q7. At the same time, Q2 drives the source of Q7 in a folded cascode connection, so that both input transistors drive the secondary gain stage. The DC offset point of this system is set by P1. While the amplifier is primarily biased by the output stage constant current

18、 source, the design provides for pull operation beyond the constant current bias point with a set of P channel source followers. The bias relation between the P and N channel source follower output devices is set by the constant voltage circuit of Q5 and adjusted by P2. Normally, the P channel outpu

19、t stage will be biased at about 10% of the value of the constant current source, or about 100 ma. C5 provides 10 picofarads of forward compensation in the feedback loop. C6 provides 39 pf of compensation for Q6. Z3 provides protection for the gate of Q7 when Q6 is shut down on a negative waveform cl

20、ip. Q8 provides current limiting for Q6 during a positive waveform clip. R1 and C7 provide loading at radio frequencies. If R1 is damaged, it is a sure sign of high power at high frequencies, such as full power at 100 KHz or Square waves above 20 KHz. Unless it is on a test bench, the only way the a

21、mplifier will experience this will be in system oscillation, where the output of the amplifier is allowed to bleed back to the input. This is generally due to wiring fault in the system. RadioFans.CN 收音机爱 好者资料库 4.7UF C8 C3 390PF 2.7 R1 GND C4 390PF .047 C7 THERMISTOR T1 50K 9.1V Z3 R17 100K 4.75K R1

22、6 R11 2.2K 5K P1 C W W C C W IRFD210 Q1 IRFD210 Q2 9.1V Z1 9.1V Z2 680 R10 Q3 IRF610 221 R9 Z101 9.1V R109 4.75K Z102 9.1V MPSA92 Q101 R108 4.75K R107 15K Q8 MPSA92 R7 221 221 R8 IRF9510 Q7 Q6 IRFD9210 4.75 R2 IRFD210 Q5 Q4 IRF610 150 R3 R4 221 100K R18 C5 10PF 7.5K R12 GND 5K P2 C W W C C W C6 39PF

23、 C2 390PF C1 390PF 221 R6 4.75K R14 4.75K R15 R13 4.75KR5 221 +DRIVE OUTPUT -DRIVE + + INPUT - INPUT ALEPH 0S FRONT END PL10FE.S01 PASS V- V+ 12/13/93 ABCD 4 3 2 1 DCBA 1 2 3 4 B RevNumber Title Size Date Filename Drawn by ofSheet RadioFans.CN 收音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 220 50V C106 10 R103

24、3.3K 2W R105 3.3K 2W R104 10 R102 220 50V C105 4.7UF C8 2.7 R1 GND .047 C7 THERMISTOR T1 50K 9.1V Z3 R17 100K 4.75K R16 R11 3.3K 5K P1 C W W C C W IRFD210 Q1 IRFD210 Q2 9.1V Z1 9.1V Z2 680 R10 Q3 IRF610 221 R9 Z101 9.1V R109 4.75K Z102 9.1V MPSA92 Q101 R108 4.75K R107 15K Q8 MPSA92 R7 221 221 R8 IRF

25、9510 Q7 Q6 IRFD9210 10 R2 IRFD210 Q5 Q4 IRF610 150 R3 R4 221 100K R18 C5 10PF 4.75K R12 GND 5K P2 C W W C C W C6 39PF C2 390PF C1 390PF 221 R6 4.75K R14 4.75K R15 R13 4.75KR5 221 FIG 3 OTHER CH V- V+ +DRIVE OUTPUT -DRIVE 11/6/93 + + INPUT - INPUT ALEPH 0S FRONT END PASS PL10FE11.S01 ABCD 4 3 2 1 DCB

26、A 1 2 3 4 B RevNumber Title Size Date Filename Drawn by ofSheet RadioFans.CN 收音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 221 R54.75K R13 R15 4.75K R14 4.75K R6 221 390PF C1 390PF C2 39PF C6 GND R18 100K 221 R4 R3 150 IRF610 Q4 Q5 IRFD210 R2 10 IRFD9210 Q6 Q7 IRF9510 R8 221 221 R7 MPSA92 Q8 15K R107 4.75K R10

27、8 Q101 MPSA92 9.1V Z102 4.75K R109 9.1V Z101 R9 221 IRF610 Q3 R10 680 Z2 9.1V Z1 9.1V Q2 IRFD210 Q1 IRFD210 P1 5K C C W W C W 2.2K R11 R16 4.75K 100K R17 Z3 9.1V 150K T1 THERMISTOR C7 .047 GND R1 2.7 C8 4.7UF R? 2.2K R? 2.2K R? 2.2K 10PF C5 R12 4.75K P2 5K C C W W C W 680PF C3 680PF C4 V+ V- PASS PL

28、10FE.S01 ALEPH 0S FRONT END - INPUT + INPUT + 11/6/93 -DRIVE OUTPUT +DRIVE ABCD 4 3 2 1 DCBA 1 2 3 4 B RevNumber Title Size Date Filename Drawn by ofSheet RadioFans.CN 收音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 3.3K 2W R105 10 R103 3.3K 2W R104 10 R102 220 50V C101 220 50V C102 10 R19 10 R20 9.1V Z1 9.1V Z2

29、 9.1V Z5 100K R7 C4 220 50V 100K R8 9.1V Z4 9.1V Z3 220 50V C3 5K P2 C W W C C W C5 10PF R13 33K 2W VAL R14 Z102 9.1V R101 15K 2W 4.7UF C8 2.7 2W R11 GND .047 C7 R5 100K 4.75K R4 R9 3.3K 5K P1 C W W C C W IRFD210 Q1 IRFD210 Q2 680 R17 Q3 IRF610 221 R15 Z101 9.1V Q8 MPSA92 221 R12 IRF9510 Q7 Q6 IRFD9

30、210 10 R10 IRFD210 Q5 Q4 IRF610 150 R18 R16 221 100K R6 C6 39PF C1 390PF C2 390PF 4.75K R1 4.75K R3 R2 4.75K C9 .1 UF -V +V 4/25/94 +DRIVE OUTPUT -DRIVE + INPUT - INPUT ALEPH 0S FRONT END PASS PL10FE13.S01 ABCD 4 3 2 1 DCBA 1 2 3 4 B RevNumber Title Size Date Filename Drawn by ofSheet RadioFans.CN 收

31、音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 Figure 3 shows the output stage schematic. It shows one-half of one channels output stage, which contains 6 output devices. The top IRF244 is an output follower. The bottom IRF244 Mosfet is a constant current source. The P channel IRF9240 transistor is a follower wh

32、ich contributes beyond the current provided by the constant current source. On each module, R205 supplies current to Q204, which is the driver for the output stage active current source. The gate of the output stage current source Mosfet is driven by the collector of Q204 at about 4.5 volts. This vo

33、ltage is controlled through current feedback from the source of the Mosfet connected to the base of Q204. The Base-Emitter junction voltage of Q204 is about .7 volt, and the circuit operates to hold the source voltages about .7 volt above the negative rail voltage, which puts .7 volt across the 1.3

34、ohm source resistor on each current source Mosfet, which controls 580 ma each times 2 modules, or 1.15 amps constant current biasing the output stage. Note that the output devices are matched for Gate to Source voltages at 200 ma on all transistors to within .1 volt. This means that all IRF9240 devi

35、ces within an amplifier are matched, and that all IRF244s used as output followers are matched, and all IRF244s used as constant current sources are matched. The match voltage of each transistor is written on the case at Pass Labs, and ranges from 3.00 to 4.99. If it is necessary to replace devices

36、in the field, they must be a match. Devices with a particular number may be obtained from Pass Laboratories. Figure 5 shows the PC layout of the front end board. Note that the control and power connections to the output stage are through wires connected by screw-down terminal connectors. The wires c

37、oming off the main board are attached to the output stage modules by corresponding connections. ADJUSTMENTS AND SERVICE Initial power up procedures: For an amplifier in unknown adjustment or being powered up for the first time after repair or modification. Essential Equipment: Oscilloscope, Audio si

38、gnal source, Variable AC power source, AC line current meter, 8 ohm load. A distortion analyzer is very helpful confirming proper operation, but is not essential to adjustment of an otherwise working amplifier. If you do not have an AC line current meter, you may place a .1 ohm 5 watt power resistor

39、 in series with the AC line (cold) and measure the voltage across it (1 amp = .1 volt AC), taking care not to electrocute yourself. RadioFans.CN 收音机爱 好者资料库 Check the AC line fuse Set signal source to .1V at 1 KHz Attach signal source Attach 8 ohm load. Monitor the amplifier output with oscilloscope,

40、 Set the AC line source to 0. AC power switch on P1 (offset adjust) should be at mid-position. P2 (bias adjust) should be at mid-position. Slowly turn up the AC line voltage to 1/3 while watching the current draw. Rated power draw: 1.4 A avg. 120 VAC, .7 A avg. 240 VAC Rated power draw: 1.4 A 120 V

41、1.4 (power factor) = 240 Watts You will see the amplifier draw current near to rating when the AC line voltage is at 1/3 rating or more. At 1/3 AC line voltage, adjust P2 for minimum current draw (maximum resistance for P2). At this position, the power draw of the amplifier will be that of the outpu

42、t stage constant current source. Different means of measurement of AC current draw will give slightly different results. However the constant current source of the output stage draws most of the power in the amplifier and is quite accurate. On a working amplifier it may be used as the basis or norm

43、for current measurement. If the DC offset at the output is excessive, then you should adjust P1 on the front end board. Initially this will usually be set to middle. P1 will have to be readjusted after a warm-up period of at least an hour. If the power draw is correct and a clean 2 volt signal appea

44、rs at the output and DC offset is minimized, then the amplifier probably works. You may slowly increase the AC line voltage to full rating while watching the output wave form and the current draw. Then increase the signal level to full output of the amplifier, verifying proper operation up to clippi

45、ng. With the bias set to minimum, there will be some distortion at higher power levels, which is expected. RadioFans.CN 收音机爱 好者资料库 After you have verified that the amplifier will drive an 8 ohm load to 40 watts, you can set the bias point. It is quite easy. First, make note of the current draw of th

46、e amplifier with both channels at minimum bias and with the amplifier cold. Multiply this figure by 20%. Then without a load or signal, idle the amplifier for an hour or more. Noting the minimum current draw after warm-up, adjust P2 of one channel so that the current draw is one half the difference

47、between the warm value and 1.2 times the cold value. Then adjust P2 of the other channel so that the current draw is not 1.2 times the cold minimum draw. Typical example: The cold AC current draw with the bias at minimum is 1.2 amps. Let the amplifier warm up for at least an hour. Now the bias will

48、be 1.0 amps. Set the bias P2 of one channel to one-half the difference between the 1.0 amps and 1.2 amps plus 20%, or 1.44 amps. One half of the difference in this case is 1.22 amps, so set the first channel for 1.22 amp AC line draw. Now set the second channel so that the AC line draw is now 1.44 a

49、mps. At the factory, we set 120 volt units for 1.4 A average AC line draw, with 1.6 A for 100 volt line, and .7 A for 240 volt line. Your voltmeter might be different, which is why we have the above procedure. When you are done, the warmed up amplifier should draw AC line current which is 20% more than the minimum possible line draw with the amplifier cold. Any questions, call the factory. The DC offset must be readjusted after warm-up also, setting it as close to 0 DC as possible. The DC offset will drift for an hour after this, and must be set again. Probably the least pre