Yamaha-QL-1-Service-Manual-Part-4电路原理图.pdf
《Yamaha-QL-1-Service-Manual-Part-4电路原理图.pdf》由会员分享,可在线阅读,更多相关《Yamaha-QL-1-Service-Manual-Part-4电路原理图.pdf(67页珍藏版)》请在收音机爱好者资料库上搜索。
1、HGFEDCBA 1 2 3 4 5 6 3 QL5/QL1 BLOCK DIAGRAM 001 (QL5/QL1) BLOCK DIAGRAM 001 (QL5/QL1)28CA1-2001135745-1 GENERAL DIAGRAM (全体図) Ch name LCD AC IN SLOT 1-2 QL5: OMNI OUT 1-16 QL1: OMNI OUT 1-8 Signal line Power line Ch name LCDCh name LCD Dante Primary Dante Secondary QL5: INPUT 1-32 QL1: INPUT 1-16 P
2、HONES DIGITAL OUT GPI WORD CLOCK In/Out MIDI In/Out USB Fan Ethernet for PC See page 6 See page 6 See page 6 See page 6 See page 6 See page 5 See page 5 See page 5 See page 9 See page 9 See page 9,10 See page 6 See page 6 See page 6See page 6 See page 6 See page 6 See page 6 See page 10 CN601-608 (1
3、2P) CN601-608 (12P) CN003(11P) CN181(11P)CN281(4P) POWER SUPPLY UNIT POWER SWITCH QL5 only QL5 only QL5 only (QL5) (QL1) (QL5) (QL1) QL5 only(INPUT 25-32) (INPUT 17-24) PN16S FD2 CN506 (22P) CN101 (12P) CN101 (12P) CN001 (12P) CN002 (7P) CN001 (12P) CN003 (11P) DCS DSP32 CPUQL FX DSP16 DNT5DNT1 DCM
4、LCDC PN16M FD1M FD1S ACSW LAMP1LAMP2 PN2 USB ENCPNR PNL DA JK HP HAAD (INPUT 1-8) See page 8 (INPUT 9-16) CN001(9P) CN602 (7P) CN601 (7P) CN603 (8P) CN103 (5P) CN102 (6P) CN402(20P) CN351(180P) CN601(180P) CN101 (180P) CN401(180P) CN101(126P) CN221(38P), CN222(38P) CN221(38P), CN222(38P) CN031 (6P)
5、CN601 (40P) CN751 (40P) CN001 (12P) CN182(11P)CN585(9P) CN581(14P) CN581(14P)CN584(6P) CN202 (4P) CN1 (3P) CN2 (8P) CN201 (2P) CN901(23P)CN902(16P) CN001 (14P) CN903 (8P) CN001(14P) CN582(16P), CN583(16P) CN582(16P), CN583(16P) CN801(23P), CN802(23P) CN803(23P), CN804(23P) CN902 (8P), CN903 (8P)CN93
6、1 (12P) CN651 (100P), CN652 (100P) Brooklyn2 (Dante module) See page 4 See page 5 See page 7 See page 4See page 8 (OMNI OUT 1-8)See page 8 (OMNI OUT 9-16) See page 4 QL5 only QL5 only QL5 only QL5 only QL5 only QL5 only QL5 only QL5 only QL5 only (QL5 only) (QL5 only) CN501 (22P) CN101 (12P) CN001 (
7、12P) CN002 (7P) CN102 (16P) CN505 (8P) CN102 (5P), CN150 (4P) CN101 (6P) CN301(21P), CN302(22P) CN202 (4P) CN201 (5P) CN401(9P) CN006(9P) CN203 (2P) CN301 (4P) CN251 (2P) CN101 (9P) CN653(12P), CN951(10P), CN981(3P) CN201(10P), CN232(3P), CN751(12P) CN231 (3P) CN001 (6P) CN301 (4P) CN401 (4P) CN301(
8、21P), CN506(22P) CN502(8P) CN1 (20P) FPC1(4P), CN2(6P) CN401(8P) CN101(16P) CN201(14P), CN202(17P) CN302(17P), CN303(14P) CN303(12P) CN103(4P), CN104(6P) LCD Unit /w Touch Panel HGFEDCBA 1 2 3 4 5 6 4 QL5/QL1 BLOCK DIAGRAM 002 (QL5/QL1) BLOCK DIAGRAM 002 (QL5/QL1)28CA1-2001135745-2 DSP, FX, JK See p
9、age 6 See page 6 See page 5 See page 5 DSP block See page 11 15MHz 49.152 MHz 45.1584 MHz Master Clock CPLD (PLLPU) CPU bus DIGITAL OUT AES/EBU GPIReg. IN OUT WORD CLOCK IN OUT MIDI PC DIT CS8406 Master Clock SLOT OUT 2ch or 4ch/line 8 / / 8 2ch or 4ch/line SLOT IN SLOT WCIN 2 / BNC IN Master Clock
10、See page 8 See page 8 DAOUT 2ch/line 4or8 / See page 8 PHONE OUT 2ch/line ADIN 1-8,9-16,17-24,25-32 PHONES L-R Tx_CPU 2TR OUT 2ch/line /RESET_ADA /RESET ADA /RESET_ADA,/RESET_CPU DAOUT 1-8,9-16 (INPUT 1-8) (OMNI OUT 1-8) (PHONES) PLL E-bus E-bus PCA 9516 DSP7 QL5 *7 QL1 *5 FPGA (LAB) DSP6 *4 SHARC *
11、1 See page 7 DANTE CLOCK ADIN 2ch/line 8or16 / Master Clock Master Clock Master Clock (OMNI OUT 9-16) (INPUT 9-16) (INPUT 17-24) (INPUT 25-32) Mini-YGDAI SLOT SLOT1 SLOT2 QL5 only SPI, UART See page 6 I2CPCA 9516 Ethernet (Editor) Ethernet MAC/PHY Ethernet (SCP/ Nuendo Extension) See page 5 USB SCI
12、SCI 60MHz 24.576MHz 25MHz MP3 QL5 DSP SRC CPLD Clock CPU IN/OUT 2ch/line Master Clock LAMP CNT See page 9 CAUTIONS Dante IN 8ch/line QL5: *8 QL1: *4 / / Dante OUT 8ch/line QL5: *8 QL1: *4 LCDC FD2 DCM FX CPUQL DNT5 QL1DNT1 QL5DSP32 QL1DSP16 HAAD DA HP FD1M PN16M USB JK JK101 JK301 JK302 JK401 CN201
13、CN103(5P) IC102,103(20P) IC651-659(20P) IC751(20P) IC602(16P) CN651(100P) CN652(100P) IC601(16P) IC981(14P) CN751(40P) CN801-804(23P)CN901(23P) CN901(11P), CN902(8P), CN903(8P) CN901(11P), CN903(8P) CN931(12P)CN001(12P) CN751(40P) CN601(40P) IC101(28P) IC201, 202(20P) IC301(16P) IC302(16P) IC402(6P)
14、 IC401(16P) IC601, 602 (20P) CN102(6P) CN201 (5P) CN101 (6P) CN603(8P) CN505 (8P) CN601(7P) IC114-117(20P), IC118, IC119(24P) IC554(100P) IC553(30P) IC221(48P) IC151(144P) IC157(14P) X221 X151 X201 IC801-804(20P) IC931(20P) IC901, 902 (20P) X101 X152 IC552 (144P) CN002 (7P) CN602(7P) CN002 (7P) CN98
15、1(3P) CN232 (3P) CN101 (180P) CN601 (180P) CN221(38P), CN222(38P) CN221(38P), CN222(38P) QL5 only QL5 only QL5 only HGFEDCBA 1 2 3 4 5 6 5 QL5/QL1 BLOCK DIAGRAM 003 (QL5/QL1) BLOCK DIAGRAM 003 (QL5/QL1)28CA1-2001135745-3 CPU, LCDC, USB, 10.4 LCD OSC 27.2MHz +1.8D +3.3D DC-DC +1.2D +1.8D RESET (3.0V)
16、 RESET (2.9V) CPLD Address Decode Wait Control E-Bus BUSY IRQ OR DDR2-SDRAM 1Gbit x2 +3.3D +3.3D +3.3D MRAM 1Mbit FlashROM 512Mbit (MAC Address Inside) E-Bus Controller +3.3D +3.3D+3.3D BUFFER +3.3D LVDS Tx +3.3D 10/100Base PHY +3.3D OSC 50MHz +3.3D OSC 48MHz +3.3D RTC +3.3B +3.3B +3.3D CPU SH7724 +
17、3.3D+1.2D Xtal 32.768KHz 32bit+1.8D t i b61t i b618bit CKO /WAIT IRQ CPU Bus LCDC LCD module with Touch Panel 16bit PORT I2C RMII /IRQ_MY x3 /WAIT CKOLCDDONEthernet (Editor) A1:24 D0:15 E-Bus Wired OR /SYSRES SCI x3I2C USB Hub +3.3D Xtal 12MHz USB USB Power Switch +5D CPU M38039 CERALOCK 16MHz Touch
18、 Panel Position Detect (Tr. x5, AND x2) AD PORT +5D SCI DSUS /SYSRES See page 4 PORT SCISPII2C Battery Backup & Check (Comparator, Diode, FET) SPI LED(BL) Driver +5D +12D PORT USB USBPORT PORT PORT FSI Fs, 64Fs (Master Clock) TDM (2ch/line) /RES_IN +5D +12D +24D DC-DC +24D +3.3L See page 9 8bit IRQ
19、x5 IRQ CPU Bus CAUTIONS(DCMS), . PORT RESETS, . IN : OUT : CPU Core : DDR2-SDRAM : BUS : 489.6MHz 163.2MHz 81.6MHz 2 MAC Addresses inside LCDC DCM CPUQL QL5DSP32 QL1DSP16 USB CN202 (4P) CN201 (5P) IC201 (48P) IC203(5P) IC103(5P) IC202(100P) IC203(20P)IC204(44P) IC401(48P) IC602-607 (20P) IC402 (33P)
20、 IC205(56P) IC301, 302 IC104(8P) BT501 D501, D502, FT501, FT510 IC503(5P) IC502 (10P) IC201(8P) IC106(5P) IC105(25P) X101 X501 X404 X401 IC101 CN103 (5P) CN101(180P) CN301(180P) CN102 (6P) CN101 (9P) CN281(4P) CN1(20P) CN151(6P) CN102(5P), CN150(4P) CN101 (6P) CN402 (20P) CN203 X201 HGFEDCBA 1 2 3 4
21、 5 6 6 QL5/QL1 BLOCK DIAGRAM 004 (QL5/QL1) BLOCK DIAGRAM 004 (QL5/QL1)28CA1-2001135745-4 PN16M, PN16S, PNL, PNR, ENC, FD2, FD1M, FD1S, PN2, Ch Name LCD E-Bus拡張I/F 16MHz CPU M38039 EC_PNS1 STANDARD MODE SLAVE ADDRESS 0 LED Matrix SW Matrix LED Sink Driver CPU M38039 EC_PNS1 STANDARD MODE SLAVE ADDRES
22、S 1 LED Matrix SW Matrix LED Sink Driver 16MHz 3 to 8 DEMUX LED Matrix SW Matrix CPU LPC1763 P-MD1 100MHz I2C MODE I2C 400kbit/s I2C ID 0 3 to 8 DEMUX Ch Name LCD LCD Multi Color LED Multi Color LED Ch Name LCD LCD Mu ti Color LED Multi Color LED Ch Name LCD LCD Multi Color LED Multi Color LED Ch Na
23、me LCD LCD Multi Color LED Multi Color LED Constant current LED Sink driver 3 to 8 DEMUX Ch Name LCD LCD Multi Color LED Multi Color LED Ch Name LCD LCD Multi Color LED Multi Color LED Ch Name LCD LCD Multi Color LED Mu ti Color LED Ch Name LCD LCD Multi Co or LED Multi Color LED Constant current LE
24、D Sink driver 3 to 8 DEMUX Ch Name LCD LCD Mu ti Color LED Multi Color LED Constant current LED Sink driver I2C LED Driver Data CS LED Driver Data Ch Name LCD Control LED Driver Control 100mm motorized fader (2) 24 LED Source Driver LED Source Driver QL5 only CPU H8/3683 E-FDC 20MHz 100mm motorized
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- Yamaha QL Service Manual Part 电路 原理图