Yamaha-NXAMP-4-X-1-Service-Manual电路原理图.pdf
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1、SERVICE MANUAL PANEL LAYOUT .3 CIRCUIT BOARD LAYOUT .4 SERVICE PRECAUTIONS .5 OVERALL ASSEMBLY WIRING.7 DISASSEMBLY PROCEDURES .17 LSI PIN DESCRIPTION.26 IC BLOCK DIAGRAM .27 CIRCUIT BOARDS.33 TEST PROGRAM.52 INSPECTIONS .59 UPDATING THE FIRMWARE .64 PARTS LIST IC HIGH: Bypass mode (through) (2) Tes
2、t, must be connected to DGND (2) Audio data latch enable input/output (1) Audio data bit clock input/output (1) Audio data digital output Digital GND Digital power supply, 3.3 V System clock input: 256 fs, 384 fs, 512 fs or 768 fs (3) Oversampling ratio select input / LOW: x 64 fs, HIGH: x 128 fs (2
3、) Audio data format select input 0 / See data format section (2) Audio data format select input 1 / See data format section (2) Mode select input 0 / See data format section (2) Mode select input 1 / See data format section (2) PIN NO. NAMEI/OFUNCTION PCM1803ADBR (X7357B0) A/D CONVERTERCONTROL: IC03
4、5, IC036, IC037, IC038 I I I I I I/O I/O O I I I I I I (1) Schmitt trigger input (2) Schmitt trigger input with internal pulldown (50 k, typically), 5 V tolerant (3) Schmitt trigger input, 5 V tolerant NXAMP4x1 27 I IC BLOCK DIAGRAM D0 Q0 RDQ QD CP FF1 D1 Q1 RDQ QD CP FF2 D2 Q2 RDQ QD CP FF3 D3 Q3 R
5、DQ QD CP FF4 D4 CP MR Q4 RDQ QD CP FF5 D5 Q5 RDQ QD CP FF6 D6 Q6 RDQ QD CP FF7 D7 Q7 RDQ QD CP FF8 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 MR Q0 D1 D0 Q1 Q2 D2 D3 Q3 GND Q7 D6 D7 Q6 Q5 D5 D4 Q4 CP VCC IN1 REFI1 RESET MUTE SCL/CCLK SDA/MOSI AD0/CS ENOut DGND VD REFI8 IN8 REFO8 OUT8 OUT7 OU
6、T6 REFO7 REFO6 REFI7 REFI8 IN7 IN6 VA+ VA- REFO1 OUT1 OUT2 OUT3 REFO2 REFO3 REFI2 REFI3 IN2 IN3 VA- VA+ VA+ VA- OUT5 REFO5 IN5 REFI5 REFI4 IN4 REFO4 OUT5 VA+ VA-1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 5 3
7、I2C/SPI Control Port I2C/SPI Serial Control 8-channel Analog Inputs 8-channel Analog Outputs 8V to 9V +3.3V Zero Crossing Detector RDQ Q latch 1 SD Q0 A0 RDQ Q latch 2 SD A1 RDQ Q E latch 3 SD A2 RDQ Q latch 4 SD A3 LE Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15 VCC A3 A2 Q10 Q11 Q8 Q9 Q14 Q1
8、5 Q12 Q13 E 1 2 3 4 24 23 22 21 A0 A1 Q7 Q8 Q5 Q4 Q3 Q1 Q2 Q0 GND LE 5 6 7 8 9 10 11 12 20 19 18 17 16 15 14 13 DC D CP Q Q 3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 U/D CP D0 D1 D2 D3 CEP GND VCC TC Q0 Q1 Q2 Q3 CET PE D1 D CP Q Q 4 D2 D CP Q Q 5 D3 PE CEP CET CP U/D D CP Q Q 6 9 7 10 2 1 TC 15 Q3 11
9、 Q2 12 Q1 13 Q0 14 74HCT273PW,118 (X8681A0) D-type Flip Flop PN-AN: IC002, 003 74LVC169PW,118 (X8482A0) Binaly Counter CONTROL: IC044, 045 74HCT4514PW,118 (X8630A0) Decoder PN-AN: IC004-007 CS3318-CQZ (X8486A0) Volume Controller CONTROL: IC001 NXAMP4x1 28 Switched Capasito DAC and Filterr Selectable
10、 Interpolation Filter Modulator Left Differential Output Left Differential Input Left and Right Mute Controls 5V Selectable Interpolation Filter Volume Control Mixer LOW-Latency Anti-Alias Filter High Pass Filter and DC Offset Calibration Modulator Level TranslatorLevel Translator PCM Serial Interfa
11、ce/Loopback 3.3V to 5V2.5V to 5V Hardware or I2C/SPI Control Data Serial Audio Output Serial Audio Intput Reset External Mute Control Internal Oscilator Internal Voltage Reference Registor/Hardware Configuration Volume Control Switched Capasito DAC and Filterr Multibit Oversampling ADC Right Differe
12、ntial Output Right Differential Input LOW-Latency Anti-Alias Filter High Pass Filter and DC Offset Calibration Multibit Oversampling ADC 1 LO 2 3 4 5 6 7 COM VCC VS VB HO 9 10 11 12 13 14 VSS LIN SD HIN VDD 8 VDD/VCC LEVEL SHIFT PULSE GEN PULSE GEN VDD VSS HIN SD LIN 10 9 11 12 13 R S Q RSQ VDD/VCC
13、LEVEL SHIFT HV LEVEL SHIFT UV DETECT UV DETECT DELAY PULSE FILTER R R S Q 6 7 5 3 1 2COM LO VCC VS VB HO 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 EN C1+ V+ C1 C2+ C2 V RIN FORCEOFF VCC GND DOUT FORCEON DIN INVALID ROUT DIN DOUT Auto-powerdown INVALID RIN FORCEOFF FORCEON ROUT EN 11 16 12 98 10 13 1 5
14、2 SHI Interface 212 Triple Timer ESAI Interface 12 ESAI_1 Interface Peripheral Expansion Area 24-Bit DSP56300 Core DDB YAB XAB PAB DAB YDB XDB PDB GDB Power Mngmnt. 11 Memory Expansion Area GPIO DAX PIO_EB PM_EB XM_EB YM_EB Bootstrap ROM Internal Data Bus Switch Program Interruput Controller Clock G
15、en- erator EXTAL RESET PINIT/NMI MODA/IRQA MODB/IRQB MODC/IRQC MODD/IRQD Address Generation Unit Six Channel DAM Unit PLL EFCOP Program RAM 4K x 24 ROM 64K x 24 X Data RAM 36K x 24 ROM 32K x 24 Y Data RAM 48K x 24 ROM 32K x 24 4 Program Decode Controller Program Address Controller Data ALU 24 x 24+5
16、6 56-bit MAC Two 56-bit Accumulators 56-it barrel Shifter JTAG OnCETM CURRENT GENERATOR THERMAL PROTECTION VOLTAGE GENERATOR VIN VOUT GND THERMAL COMPENSATION CS4272-CZZR (X8487A0) CODEC CONTROL: IC012, 013 IR2110 (X2382A02) Driver PSANL: IC302, 303 LD1117STR (X8495A0) Regulator CONTROL: IC024 MAX32
17、21CPWR (X2757A0) RS-232C Driver CONTROL: IC041 DSPB56371AF180 (X8489A0) DSP CONTROL: IC022, 023 NXAMP4x1 29 CATHOD REFERENCE ANODE (A) CATHODE (K) REFERENCE (R) ANODE CS# SO GND VCC HOLD# 1 2 3 45 6 7 8 SI WP# SCLK Data Register SRAM Buffer Output Buffer Sense Amplifire HV Generator Mode Logic SO St
18、ate Machine SI Y-Decoder Memory Array Page Buffer X-Decoder CS# Address Generator SCLKClock Generator 1 2 3 4-V 8 7 6 5 Output A+V Non-Inverting Input A -DC Voltage Supply +DC Voltage Supply Output B Inverting Input B Non-Inverting Input B Inverting Input A+- +- 1 2 3 4- V 8 7 6 5 Output A+V Non-Inv
19、erting Input A Ground +DC Voltage Supply Output B Inverting Input B Non-Inverting Input B Inverting Input A+- +- COMMON OUTPUT R23 R24 R13 R14 R20 R17 D3 Q22 Q21 Q25 Q20 Q24 Q18 Q9 R18 R19 R16R15R21R12R11 R10 Q17 R9R8 R7 R5 R4 D2D1 R6 C1C2 C3 R22 Q11 Q13 Q14 Q15 Q19 Q16 Q23 Q8 Q7 Q2 Q1 Q6 Q5 Q3 Q10
20、Q12 Q4 R1 R2 R3 INPUT INPUT OUTPUT GND INPUT OUTPUT GND MX25L1605AM2C-12G (X8718A0) Flash Memory CONTROL: IC039 NJM431U (TE1) (X6770A0) SHUNT Regulator PSANL: IC204 NJM2068M-D (X3505A0) Operational Amplifier CONTROL: IC002-005, 008-011, 018-021, 028-034 INANL: IC701, 702 OUTANL: IC801, 802 NJM79M09D
21、L1A (X5366A0) Regulator CONTROL: IC007 NJM7815FA (XD853A0) Regulator +15V PSANL: IC202, 203 NJM78M09DL1A (XZ940A0) Regulator CONTROL: IC006 NJM2904V (TE1) (XR532A0) Operational Amplifier CONTROL: IC047, 048, 050, 052 NXAMP4x1 30 ON/OFF circuit Voltage regulator Soft Start - + Oscill ator fo Conversi
22、on circuit Q R S + - Over Heat Detection circuit Drive Circuit F/F Comparator AMP Vref VIN VB Vo ON/OFF V NC adj COM 18 4 5 3 2 6, 7 Over current Detection circuit 2 ERROR AMP. 1 COMP. S 50A GROUND SYNC. COMP. INV.INPUT SOFT-START SHUTDOWN N.I.INPUT DISCHARGE 5k 5k VREF VREF Vi RT CT S R 9 5 7 6 3 1
23、2 15 8 10 FLIP FLOP TO INTRENAL CIRCUITRY OSCILLATOR OUTPUT PWM LATCH U.V. LOCK OUT OSC. REF. REG. 16 4 NOR OUTPUT B SG1525A OUTPUT STAGE SG1527A OUTPUT STAGE 14 NOR VC OUTPUT A11 13 OR OUTPUT B14 OR VC OUTPUT A11 13 FB IN- SCP SCP 0.5 A 2A 2k GND OUT RT RT RT DTC 0.5V PWM 1V 1V UVLO V+ 0.8V 0.2V 1V
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