Philips-EXP-341-Service-Manual电路原理图.pdf

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1、PRODUCT FAMILY EXPANIUM 8cmTechnical specification .1-1Connections and controls .1-2Firmware upgrade .1-2Features .1-3Accessories .1-3Safety .switches the set on, starts playback andinterrupts playback! .MP3-CD only: selects the previous album orskips backward .skips backward and searches backward#

2、.skips forward and searches forward$ +.MP3-CD only: selects the next album or skipsforward% OPEN 2 .opens the CD lid LINE OUT/p.3.5mm line out to connect- the headphones- the remote control- this set to the audio input of your stereoequipment:fi Upgrading is displayed and upgrading starts. This may

3、takesome minutes. After upgrading is finished, Upgrade completeis scrolled.fi Wrong upgrade file is scrolled: Your set already has thelatest firmware or the downloaded file does not correspond toyour set.fi Upgrade file defect is scrolled: The upgrade file has beendamaged during the download or when

4、 burning the CD-ROM.Download the file again, burn a new CD-ROM and try again.fi No upgrade file is scrolled: No upgrade file was found on theinserted CD-ROM.Note: If upgrading is interrupted accidentally, repeat steps 5 and6 until upgrading is completed successfully.LINEOUTVOL.OPENSOUNDSESPALBUMALBU

5、MSEARCHPLAYSTOPDISPLAYMODE4.5VDCOFF RESUME HOLD1234567890!#$%*this pin should be tied low26 CL16 CD10 fi 16.9344 MHz system clock output27 DATA CD10 fi DSP serial data output (3-state)28 WCLK CD10 fi DSP word clock output (3-state)29 SCLK CD10 fi DSP serial bit clock output (3-state)30 EF CD10 fi DS

6、P C2 error flag output (3-state)31 TEST2 GND test control input 2; this pin should be tied low32 KILL CD10 fi kill output (programmable; open-drain)33 VSSD1 GND digital ground 234 V2/V3 CD10 fi versatile I/O: input versatile pin 2 or output versatile pin 3 (open-drain)35 WCLI DSP fi CD10 word clock

7、input (for data loopback to DAC)36 SDI DSP fi CD10 serial data input (for data loopback to DAC)37 SCLI DSP fi CD10 serial bit clock input (for data loopback to DAC)38 RESETn P fi CD10 power-on reset input (active low)39 SDA P CD10 microcontroller interface data I/O line (open-drain output)40 SCL P f

8、i CD10 microcontroller interface clock line input41 RAB P fi CD10 microcontroller interface R/W and load control line input (4-wire bus mode)42 SILD P fi CD10 microcontroller interface R/W and load control line input (4-wire bus mode)43 STATUS CD10 fi servo interrupt request line/decoder status regi

9、ster output (open-drain)44 TEST3 GND test control input 3; this pin should be tied low45 RCK DSP fi CD10 subcode clock input46 SUB CD10 fi DSP P-to-W subcode bits output (3-state)47 SFSY CD10 fi DSP subcode frame sync output (3-state)48 SBSY CD10 fi DSP subcode block sync output (3-state)49 CL11/4 C

10、D10 fi 11.2896 MHz or 4.2336 MHz (for microcontroller) clock output50 VSSD2 GND digital ground 351 DOBM CD10 fi bi-phase mark output (externally buffered; 3-state)52 VDDD1P +2.6V (+VR) digital supply voltage 2 for periphery53 CFLG CD10 fi correction flag output (open-drain)54 RA CD10 fi servo driver

11、 radial actuator output55 FO CD10 fi servo driver focus actuator output56 SL CD10 fi servo driver slide control output57 VDDD2C +2.6V digital supply voltage 3 for core58 VSSD3 GND digital ground 459 MOTO1 CD10 fi servo driver motor output 1; versatile (3-state)60 MOTO2 CD10 fi motor output 2; versatile (3-state)61 V4 CD10 fi HF-preamp versatile output pin 462 V5 CD10 fi HF-preamp versatile output pin 563 V1 innerswitch fi CD10 versatile input pin 164 LDON CD10 fi HF-preamp laser drive on output (open-drain)3-3