Daewoo-DGK513S-dvd-sm维修电路原理图.pdf

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1、Service ManualMODEL: DG-K511SDG-K513SDG-K516S Caution : In this Manual, some parts can be changed for improving, theirperformance without notice in the parts list. So, if you need the latestparts information,please refer to PPL(Parts Price List) in ServiceInformation Center.Jaunary. 2006DVD PLAYERSm

2、(DAEWOO_DG-K511S)060115.indd 12006-1-16 15:30:46RadioFans.CN 收音机爱 好者资料库CONTENTSCONTENTSSPECIFICATIONS.2CIRCUIT OPERATIONAL DESCRIPTION.3VOLTAGE CHARTS.3CIRCUIT DIAGRAM.4PCB CIRCUIT BOARD.26WAVEFORMS.36TROUBLE SHOOTING.43INSTRUMENT DISASSEMBLY.48PARTLIST.55Sm(DAEWOO_DG-K511S)060115.indd 12006-1-16 15

3、:30:46RadioFans.CN 收音机爱 好者资料库2Laserwavelength 650nmVideoPAL/AUTO/NTSCFrequency response20Hz 20KHz (dB)Signal/noise ratio90dBChannel separation85dB ( KHz)Dynamic range80dB ( KHz)OutputAudioAnalogoutput level : 2.0 + 0/-0.2Vrms(Load impedance : ,0K)Digitaloutput level : 0.5 0.Vp-p(Load impedance : 75)

4、OutputVideoCompositeoutput level : .0 0.Vp-p(Load impedance : 75, imbalance, negative polarity)S-videooutput level : brightness(Luma) .0 0.Vp-p Chromaticity (Color) 0.286 20%(Load impedance : 75)ComponentY: Vp-p, Pb/Pr: 0.7Vp-p (Load impedance : 75)Power00-240V, 50Hz60Hz 2WDimensionesBody (W x H x D

5、)430 x 38 x 245 mmPacking50 x 88 x 305 mmWeight (Gross / Net)2.9Kg / 2.2KgNotes : Design and specifications in this instruction manual are subjected to change with-out prior notice toimprove quality and function.DVD Audio output standardsOutputDisc typeDVDVIDEO-CDCDAnalogue Audio output48/96KHz samp

6、ling44.KHz sampling44.KHz samplingDigital Audio output48KHz sampling44.KHz sampling44.KHz samplingSPECIFICATIONSSm(DAEWOO_DG-K511S)060115.indd 22006-1-16 15:30:473DVD Module. SummaryDVD One Board consists of: Loader part that reads and transmits audio and video data saved at Optic Discs (DVD, CD-DA,

7、 VCD, CD-R) to MPEG Decoder part; MPEG Decoder part, which, by decoding and encoding data received from the Loader, produces analog signals; and u-Com that controls the overall system including the loader and MPEG decoder.2. How Does it OperateInsert the power cord and then power transmitted to each

8、 IC, and the SET will be the STAND-BY status which requires the least power for input the front panel key, input the STAND BY/ON key, extinguished the LED. Once the Power On key is entered, u-Com recognizes it and initiates each chipset, performs sequential algorithms such as determining whether the

9、 disc is in or not, and if in, what type of disc is loaded. Through this process, it can read disc data before transmitting it to the MPEG Decoder. The MPEG Decoder will then decode and encode such data before generating the final analog audio and video signal outputs.DVD-MODULE Block DiagramCIRCUIT

10、 OPERATIONAL DESCRIPTIONSm(DAEWOO_DG-K511S)060115.indd 32006-1-16 15:30:484CIRCUIT OPERATIONAL DESCRIPTIONCIRCUIT OPERATIONAL DESCRIPTION3. Loader PartThe loader which read the data of audio/video from optic disc and transfer them to MPEG decoder can be divided into Deck total DVD assay(in a short t

11、erm, Mecha) and Servo. Mecha mounts with the optical pick-up which allows reading the signal of a disc using laser beam and makes it operates and consists of the deck mechanism which allows loading a disc and reading the data. Servo is a sort of circuit which allows operating the loader and recoveri

12、ng the data and consists of Motor Drive IC operating the spindle, the sled, the loading motor.Loader Block DiagramSm(DAEWOO_DG-K511S)060115.indd 42006-1-16 15:30:485CIRCUIT OPERATIONAL DESCRIPTION) Motor Drive IC: AT5668SThe AT5668S is a 5-channel BTL driver IC for driving the motors and actuators i

13、n products such as CD-ROM/DVD-ROM/DVD-Player drives. Two of the channels use current feedback to minimize the current phase shift caused by the influence of load inductance. Driver IC gener-ates the focus signal and the tracking signal for pick-up actuator, the sled signal for feed, spindle signal a

14、nd the load signal for opening and closing of the tray. The focus signal, the tracking signal, the sled signal and the spindle signal are input into each relaxant port of the drive IC(in the order of No. 26 pin, 23, 4, and ) and set the gain amplification and the center voltage through the internal

15、OP-AMP and drive on both sides and then the focus sig-nal and the tracking signal will be output as VOFC+, VOFC- and VOTK+, VOTK- on actuator, the sled signal and the spindle signal will be output as VOSL+, VOSL- and VOLD+, VOLD- on each motor. For the load signal the input opening/closing signal is

16、 output as VOTR+, VOTR- through the loading PRE FWD REV circuit.Motor Drive IC (AT5668S) Block Diagram?CIRCUIT OPERATIONAL DESCRIPTIONSm(DAEWOO_DG-K511S)060115.indd 52006-1-16 15:30:496CIRCUIT OPERATIONAL DESCRIPTIONMPEG DecoderThe signal read from DVD disc is output into the RF signal and Servo rel

17、ated signal through the RF IC and they are input into the MPEG decoder and processed the MPEG decoding and divided into video/audio signal. The video signal is output into the analog audio signal through the built-in encoder block and also the audio signal into the audio DAC through the audio decode

18、r block.MPEG decoder consists of existing MPEG-2 decoder and single chip combined the digital sig-nal processing part which is the core technology of DVD player with the Servo controller.) DVD Servo And MPEG-2 Decoder : MT389MediaTek MT389 is a DVD player system-on-chip (SOC) which incorporates adva

19、nced features like high quality TV encoder and state-of-art de-interlace processing. The MT389 enables consumer electronics manufacturers to build high quality, cost-effec-tive DVD players, portable DVD players or any other home entertainment audio/video devices.Based on MediaTeks world-leading DVD

20、player SOC architecture, the MT389 is the 3rd generation of the DVD player SOC. It integrates the MediaTek 2nd generation front-end analog RF amplifier and the Servo/MPEG AV decoder. The progressive scan of the MT389 utilized advanced motion-adaptive de-interlace algorithm to achieve the best movie/

21、video playback. It also supports a 3:2 pull down algorithm to give the best film effect. The 08MHz/2-bit video DAC provides users a whole new viewing experience.DVD Player System DiagramSm(DAEWOO_DG-K511S)060115.indd 62006-1-16 15:30:507CIRCUIT OPERATIONAL DESCRIPTIONMT389 Functional Block DiagramSm

22、(DAEWOO_DG-K511S)060115.indd 72006-1-16 15:30:508CIRCUIT OPERATIONAL DESCRIPTION2) Flash Memory : ES29LV60DB-70TGDescriptionThe ES29LV60 is a 6 megabit, 3.0 volt-only flashmemory device, organized as 2M x 8 bits (Bytemode) or M x 6 bits (Word mode) which is config-urable by BYTE#. Four boot sectors

23、and thirty onemain sectors are provided : 6Kbytes x , 8Kbytesx 2, 32Kbytes x and 64Kbytes x 3. The device ismanufactured with ESIs proprietary, high performance and highly reliable 0.8um CMOS flashtechnology. The device can be programmed orerased in-system with standard 3.0 Volt Vcc supply( 2.7V-3.6

24、V) and can also be programmed in stan-dard EPROM programmers. The device offers min-imum endurance of 00,000 program/erase cyclesand more than 0 years of data retention.The ES29LV60 offers access time as fast as 70nsor 90ns, allowing operation of high-speed microprocessors without wait states. Three

25、 separate controlpins are provided to eliminate bus contention : chipenable (CE#), write enable (WE#) and outputenable (OE#).All program and erase operation are automaticallyand internally performed and con-trolled by embed-ded program/erase algorithms built in the device.The device automati-cally g

26、enerates and times thenecessary high-voltage pulses to be applied to thecells, performs the verification, and counts the number of sequences. Some status bits (DQ7, DQ6 andDQ5) read by data# polling or toggling betweenconsecutive read cycles pro-vide to the users theinternal status of program/erase

27、operation: whetherit is successfully done or still being progressed.The ES29LV60 is completely compatible with theJEDEC standard command set of sin-gle power sup-ply Flash. Commands are written to the internalcommand register using standard write timings ofmicroprocessor and data can be read out fro

28、m thecell array in the device with the same way as used inother EPROM or flash devices.Sm(DAEWOO_DG-K511S)060115.indd 82006-1-16 15:30:519CIRCUIT OPERATIONAL DESCRIPTIONFLASH ES29LV60 Block DiagramSm(DAEWOO_DG-K511S)060115.indd 92006-1-16 15:30:510CIRCUIT OPERATIONAL DESCRIPTION3) EEPROM : AT24C6ATh

29、is stores the information related to setup of DVD menus. This can read and write the op-tional information such as OSD, voice, language option after function for subtitle etc, the aspect or method of TV display, video option like display function and audio, screen saver, parental function through th

30、e I2C transmission method.DescriptionThe AT24C6A provides 6384 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 2048 words of 8 bits each. The device is op-timized for use in many industrial and commercial applications where low power and low voltage opera

31、tion are essential. The AT24C6A is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and .8V (.8V to 5.5V) versions.Sm(DAEWOO_DG-K511S)060115

32、.indd 102006-1-16 15:30:52CIRCUIT OPERATIONAL DESCRIPTION4) SDRAM : AW39S206-7 DescriptionThe AW39S206-7s organlzed as 2-bank x ,048,576-word x 6-bit(2Mx6), fabri-cated with high performance CMOS technology, Synchronous design allows precise cycle control with the use of system clock I/O transaction

33、s are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high per-formance memory system applications.DQ0DQ15UDQMLDQMCLKCKEA10CLOCKBUFFERCOMMANDDECODERADDRESSBUFFERREF

34、RESHCOUNTERCOLUMNCOUNTERCONTROLSIGNALGENERATORMODEREGISTERCOLUMN DECODERSENSE AMPLIFIER CELL ARRAY BANK #2COLUMN DECODERSENSE AMPLIFIER CELL ARRAY BANK #0COLUMN DECODERSENSE AMPLIFIER CELL ARRAY BANK #3DATA CONTROLCIRCUITDQBUFFERCOLUMN DECODERSENSE AMPLIFIER CELL ARRAY BANK #1NOTE: The cell array co

35、nfiguration is 4096 * 256 * 16REDOCED WORREDOCED WORREDOCED WORREDOCED WORA0A9BS0BS1CSRASCASWEA11SDROM AW39S206-7 Block DiagramSm(DAEWOO_DG-K511S)060115.indd 112006-1-16 15:30:532CIRCUIT OPERATIONAL DESCRIPTION5) DAC : CS4360DescriptionThe CS4360 is a complete 6-channel digital-to-analog system incl

36、uding digital inter-polation, fourth-order delta-sigma digital-to-analog conversion, digital deemphasis, volume control, channel mixing and analog filtering. The advantages of this architecture include: ideal differential linearity, no distortion mechanisms due to resistor matching errors, no linear

37、ity drift over time and tempera-ture and a high tolerance to clock jitter. The CS4360 accepts data at audio sample rates from 4kHz to 200kHz, consumes very little power and operates over a wide power supply range. These features are ideal for cost-sensitive, multi-channel audio systems including DVD

38、 players, A/V receivers, set-top boxes, digital TVs and VCRs, mini-component systems, and mixing consoles.DAC CS4360 Block DiagramSm(DAEWOO_DG-K511S)060115.indd 122006-1-16 15:30:543Power board output voltageJPin number23456789Output voltageGNDS5V3.3VD5VGNDA5VGND+2V-2VJ2Pin number23456Output voltage

39、SWF-F+GND-24VSTB5VDecode board input voltageCNPin number23456789Output voltageGNDS5V3.3VD5VGNDA5VGND+2V-2VVOLTAGE CHARTSSm(DAEWOO_DG-K511S)060115.indd 132006-1-16 15:30:544CIRCUIT DIAGRAM1. POWER SUPPLY SCHEMATIC DIAGRAMSm(DAEWOO_DG-K511S)060115.indd 142006-1-16 15:30:56CIRCUIT DIAGRAM52. DECODE BOA

40、RD SCHEMATIC DIAGRAM) INDEX SCHEMATIC DIAGRAMSm(DAEWOO_DG-K511S)060115.indd 152006-1-16 15:30:57CIRCUIT DIAGRAM62) RF & MPEG SCHEMATIC DIAGRAMSm(DAEWOO_DG-K511S)060115.indd 162006-1-16 15:31:02CIRCUIT DIAGRAM73) SDRAM & FLASH SCHEMATIC DIAGRAMSm(DAEWOO_DG-K511S)060115.indd 172006-1-16 15:31:06CIRCUI

41、T DIAGRAM84) VIDEO OUTPUT PORT SCHEMATIC DIAGRAMSm(DAEWOO_DG-K511S)060115.indd 182006-1-16 15:31:09CIRCUIT DIAGRAM95) AUDIO OUTPUT PORT SCHEMATIC DIAGRAMSm(DAEWOO_DG-K511S)060115.indd 192006-1-16 15:31:13CIRCUIT DIAGRAM203. CONTROL BOARD SCHEMATIC DIAGRAM (DG-K511S)Sm(DAEWOO_DG-K511S)060115.indd 202

42、006-1-16 15:31:15CIRCUIT DIAGRAM2CONTROL BOARD SCHEMATIC DIAGRAM (DG-K513S)Sm(DAEWOO_DG-K511S)060115.indd 212006-1-16 15:31:16CIRCUIT DIAGRAM22CONTROL BOARD SCHEMATIC DIAGRAM (DG-K516S)Sm(DAEWOO_DG-K511S)060115.indd 222006-1-16 15:31:17CIRCUIT DIAGRAM234. MICROPHONE BOARD SCHEMATIC DIAGRAM (DG-K511S

43、/DG-K516S)5544332211DDCCBBAA400GVGK1.1ACITAMEHCS EKOARAK 3013-VD3A225002 ,21 hcraM , yadrutaSe l t iTveRrebmuN tnemucoDez iSteehS:etaDfo00000000000000000V61/FU0133C62Rk181Rk122CV61/FU0019RE339C365V05/FU7.402C2CIM2547631P00142CK015R3RK5.1B2U855456748A2U855432148k7.26RV52/FU223C82C3011212CV05/FU2.201C

44、U1.021RK2232RK018C365K012R1CIM2547631k017R03CV61/FU0191CP001K3352R1Rk7472RK001K0191R51CV05/FU3.392C301121CV52/FU2232CU1.021C32292RK012227C31C3221LBF0268R2LBFP00152C4CK4011NCP4-SNC12341Q5181CS2123BCE81CV05/FU7.4K00142R13RK7.441C3010264R72CP0012RVK02A1321RVK02A132K2211R62CV05/FU2.202RK0012CV61/FU001k0

45、101R61RK00161CV61/FU0225CK4012226CV61/FU0171C03CV61/FU7.4K112R71Rk511DV8.612V05/FU7.451C1U9925PT12345679801112131415161CCVCCV2/1CCV2/1CCVCCV2/1CCVSm(DAEWOO_DG-K511S)060115.indd 232006-1-16 15:31:18CIRCUIT DIAGRAM24MICROPHONE BOARD SCHEMATIC DIAGRAM (DG-K513S)Sm(DAEWOO_DG-K511S)060115.indd 242006-1-1

46、6 15:31:20CIRCUIT DIAGRAM255. YUV BOARD SCHEMATIC DIAGRAMSm(DAEWOO_DG-K511S)060115.indd 252006-1-16 15:31:2126PCB CIRCUIT BOARD1. POWER SUPPLY BOARDSm(DAEWOO_DG-K511S)060115.indd 262006-1-16 15:31:22PCB CIRCUIT BOARD272. DECODE BOARDSm(DAEWOO_DG-K511S)060115.indd 272006-1-16 15:31:31PCB CIRCUIT BOAR

47、D28Sm(DAEWOO_DG-K511S)060115.indd 282006-1-16 15:31:35PCB CIRCUIT BOARD293. CONTROL BOARD (DG-K511S)Sm(DAEWOO_DG-K511S)060115.indd 292006-1-16 15:31:36PCB CIRCUIT BOARD30CONTROL BOARD (DG-K513S)Sm(DAEWOO_DG-K511S)060115.indd 302006-1-16 15:31:37PCB CIRCUIT BOARD3CONTROL BOARD (DG-K516S)Sm(DAEWOO_DG-

48、K511S)060115.indd 312006-1-16 15:31:38PCB CIRCUIT BOARD324. MICROPHONE BOARD (DG-K511S)Sm(DAEWOO_DG-K511S)060115.indd 322006-1-16 15:31:39PCB CIRCUIT BOARD33MICROPHONE BOARD (DG-K513S)Sm(DAEWOO_DG-K511S)060115.indd 332006-1-16 15:31:40PCB CIRCUIT BOARD34MICROPHONE BOARD (DG-K516S)Sm(DAEWOO_DG-K511S)

49、060115.indd 342006-1-16 15:39:02PCB CIRCUIT BOARD355. YUV OUTPUT BOARDSm(DAEWOO_DG-K511S)060115.indd 352006-1-16 15:31:4236WAVEFORMS1. VIDEOCP3 Pin5 (COLOR BAR_VIDEO OUT) CVBS2. AUDIOCP3 Pin 7&8(KHz_ AUDIO OUT)Sm(DAEWOO_DG-K511S)060115.indd 362006-1-16 15:31:43WAVEFORMS37CP3 Pin6 (COAXIAL OUT)3. SYS

50、TEM WAVEFORMS D3 Pin2 RESET & +3.3V ON/OFFSm(DAEWOO_DG-K511S)060115.indd 372006-1-16 15:31:44WAVEFORMS38(AUDIO SDAT0) U6:CS4360 Pin2(AUDIO SBCLK) U6:CS4360 Pin5Sm(DAEWOO_DG-K511S)060115.indd 382006-1-16 15:31:45WAVEFORMS39(AUDIO SACLK) U6:CS4360 Pin7 (AUDIO SLRCK) U6:CS4360 Pin6Sm(DAEWOO_DG-K511S)06