Pioneer-Spec2-pwr-sm 维修电路原理图.pdf

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1、STEREO POWER AMPLIFIERSPEGI?,KCU(DrrroNEERRadioFans.CN 收音机爱 好者资料库1.2.3.4.CONTENTSSPEC|F|CAT|ONS . 3FRONT PANEL FACILITIES . . . 4CoNNECTION DIAGRAM . . 5CIRCUIT DESCRIPTION4.1 Power Amplifier 64.2 Peak Level Meter Circuit 74.3 Protection Circuit , 84.4 Surge Current Suppressor Circuit . . 10BLOCK DI

2、AGRAM . . 11ADJUSTING PROCEDURES6.1 ldle Current Adiustment . 136.2 Current Limiter Sensitivity Adiustment . . . . 146.3 Meter Amplifier Adjustment . 15D|SASSEMBLY . . . 16PARTS LOCATTONS . 205.6.7.8.9.10.EXPLODED VIEWSSCHEMATIC DIAGRAMS, P.C. BOARD PATTERNS ANDPARTS LIST10.1 Schematic Diagram and M

3、iscellaneous Parts . . 3010.2 Power Supply Circuit Assembly (AWR-093) . . 3310.3 Power Amplifier Assembly (AWH-045) . -. . 3710.4 Meter Amplifier Assembly (AWM-0811 . . 4211. PACKING . . 4712. PARTSLISTOFEXPLODEDVIEWS. .4823RadioFans.CN 收音机爱 好者资料库EiPEC.E1. SPECIFICAT|ONSSemiconductorsTransistors .55

4、Diodes . .75Power AmplifierCircuitry . . Cascaded differential Amplifier,Push-pull drive, Triple push-pull, direct coupled OCL.Continuous Power Outoutfrom 20 Hertz to 20,000 Hertz(Both channels driven) . . . . . . 250 watts per channel (g ohms)Total Harmonic Distortion at20 Hertz to 20.000 Hertz(Con

5、tinuous rated power output)o.1%(125 watts per channel power output,8 ohms) . .O.O5%(1 watt per channel poweroutput,8 ohms) . . . . . . . , . . . 0.Q5o/olntermodulation Distortion(Continuous ratedpower output) . - O.lo/o(125 watts per channel power output, S ohms) . . -.0.05%(1 watt per channel power

6、 output, 8 ohms) . . . .O.O5%Frequency Response . 5 Hertz to 80,000 HertzlldBInput (Sensitivity/lmpedance) . . . . . . . 2Vl50k ohmsOutputSpeaker. . 4ohmstoSohmsDamping Factor (20 Hertz to 20,000 Hertz, S ohms) .,. 50Hum and Noise (lHF, short-circuited, A network) . . . . . . .110d8MiscellaneousPowe

7、r Requirements . . AC 120V 60 HertzPower Consumotion . . . . . . .,. 500wattsDimensions .480(W) x186.5(H) x445(D) mm19-5/16 x 7 x13-3116inWeight: Without Package .Furnished Parts24.3kg; 54lbConnection Cord with Pin PlugsOperating lnstuctionsNOTE:Specificdtiotrt and the design subject to possible mod

8、,ficationwithout notice due to improuements.2. FRONT PANEL FACILITIESPEAK LEVEL METERSWhen speaker systems of 8O nominal impedance are con-nected, these provide direct readout of the output powerin Watts.NOTE:Speoher syotem impedance uaries occording to frequency.To obtoin o preciae medsurcment of t

9、he output poueremoue Spedher conectiotrs ond connect 8a dumtuyloods ocro4i the SPEAKERS termindls-POWER SWI CHSet to ON to energize the SPEC-2. Output will not beobtained until the PRoTEcTIoN indicator lamp Soes out.This effect is due to the internal muting circuit and doesnot indicate malfunction.M

10、ETER ZERO POINT ADJ USTMENTPROTECTION INDICATORThe lamp lights when the protection circuit functions.lf the lamp stays on during operation, turn off thePOWER switch and check as described in the sectionProtection Circuit Operation. After identifying andcorrecting the source of difficulty, if the lam

11、p still failsto extinguish, contact a Pioneer Authorized ServiceCenter,INPUT LEVEL CONTROLS (LEFT & RIGHT)Adjust LEFT and RIGHT controls according to theoutput level (voltage) of the pre-amplifier connected tothe SPEC-2 INPUT (L & R) jacks. Control positionscorrespond to 2V at MAX (fully clockwise),

12、 4V at centerof rotation, and d at MIN (fully counter-ciockwise)Normally set these controls to MAX (2V). lf the minimum output voltage of the employed pre-amplifier does not reach 2V. set the controls to MAX(2V). In this case the effective output indicated in thespecifications will not be obtained (

13、for example 1/4of the specified output can be attained with a pre-amplifier output voltage of 1V).sPEC-e3. CONNECTION DIAGRAMSTEREO TURNTABLETAPE DECK-i . , 1 I , r ,.,; rl tO C i O q1 oSTEREO PRE-AMPLIFIER (e.s. Pioneer SPEC-1)SPEAKERS IMPEDANCE swilchSt to malch the nominal imDed-ance of the spoak

14、er systms em-ployed with the SPEC-2. Be sureto turn otf the po!r beforechenging this switch setting.For about 6 to 12 seconds 6tterchanging the position o theIMPEDANCE swirch the PRO-TECTION lamp lights and soundis not obtained from the speaksrsystems. This is du6 to the built-in muting circuit,RIGH

15、T CHANNEL LEFT CHANNELSPEAKER SYSTEMS4. CIRCUIT DESCRIPTION4.1 POWER AMPLIFIERThe SPEC-2 is a high power design, employing acascoded differential amplifier first stage, push-pulldrive, and darlington triple push-pull circuit withall stages direct coupled (OCL).The circuit diagram is shown in Fig. 2.

16、 Q1 and Q2form the differntial amplifier. The input signal isapplied to Q1 and NFB from the output stageapplied to Q2 base. These two transistors are con-nected in common base circuits with Q3 and Q4,forming a cascode amplifier. Since the commonemitter circuit (Q1 & Q2) load becomes the inputof the

17、following common base circuit stage, loadimpedance is low and stable amplification can beachieved.Q3 and Q4 outputs drive Q5 and Q6 in oppositephase. The Qb output via Q7 is applied to thecurrent mirror circuit formed by D2 and Q8, wherethe phase is again inverted. Q6 and Q8 outputsthus become signa

18、ls of the same phase and performa pre-driver function.The cunent mirror circuit is depicted in Fig. 1.Current flowing through R2 and Q8 becomes equalto that flowing through Rl and D2. In other words,since R1 and R2 are equal, and the characteristicsof. D2 and Q8 base-emitter are also equal, thecurre

19、nt +BL reaching point A (in Fig. 1) throughR1 and D2 is equal to that reaching the same pointthrough R2 and Q8 base-emitter. This becomesequivalent to having Q5 output directly drivingQ8.IIIPUTHBy adopting this current mirror circuit, whenmuting relay RLb is OFF Q8 is cut off, Q10 - Q20are switched

20、OFF in succession, and operationstops. The reversed phases of Q8 and Q6 outputscause them to cancel each other, reducing popnoise and muting relay switching noise.Q13 and Q14 in the following driver stage drivethe power transistors by direct coupling. The finalstage is a high output design with thre

21、e powertransistors for each channel coupled in parallel.This parallel coupling permits comparatively largecurrent (Ic) to be employed through each tran-sistor, plus selection of an operating point withgood linearity and high amplification (hfe).+Blll:t2- llrirelFig. 1 Current Mirror CircuittuFig. 2

22、Power Amplifier CircuitCurrent Limiter CircuitThe current limiter circuit, shown in Fig. 2, consistsof Q9 - qLz. If an overcurrent flows in the powertransistors, due to low load (less than 4S2) or loadshorting, this circuit utilizes the voltage dropproduced in the power transistor emitter resistance

23、to limit the input voltage. Q9 - Q12 are normallyOFF, but if for some rea.son an overcurrent occursin the power transistors, the voltage drop compo-nent of the power transistor emitter resistanceincreases. This voltage is divided and used to biasthe bases of Q9 and Q11, switching them ON.Q9 and Ql1

24、make Q10 and Q12 conductive,limiting the signal voltages applied to the basis ofQ13 and Q14.VR2 and VR3 in this circuit set the current limit-ing value, while TH1 and TH2 are for temperaturecompensation. RLG is a selector switch for chang-ing the current limiting value at 4O load.4.2 PEAK LEVEL METE

25、R CIRCUITLogarithmic indication is required in order toprovide a broad indicating range in a single meter,without the need for range selection by the user.With respect to an 8O load, approximately 50dBlogarithmic compression is performed to allowmeter indication in the range of 0.01 - 500W.As shown

26、in Fig. 3, the circuit is divided intopositive and negative sides. Each side consists oflogarithmic compression, peak value holding andvoltage to current converter circuits. In additionthere is a cunent resultant circuits, common toboth sides. The positive side circuit operation isdescribed here.SPE

27、C-pA portion of the pov/er amplifier output signal iscompressed by the logarithmic compression circuit,which utilizes the exponential function propertiesof diodes. Figs. 4 and 5 illustrate the operatingprinciple and input-output response. The com-pressed signal is then rectified and retained for asu

28、itable length of time by the peak holding circuit,which employs a simple diode and capacitor con-struction. Holding time is determined by ttre timeconstant of C1 and R1.The holding circuit voltage is then applied to thevoltage-current converter, where it is convertedinto a current value and amplifie

29、d. The currentafterwards passes through the current resultantcircuit and drives the meter.The current resultant circuit applies the largercurrent of the positive and negative sides to the.meter for operation.Fig. 4 Equivalent Circuit of the Logarithmic CompressionlC input voltageFig. 5 Input-output

30、ResponseI fEL+ Inprt voltagc(lC)oEoeIYoltage currentConv e rtere4=eeoEPostTtvt stDElogarithmiccomp ress ionPeakr alueho ld ing7It0lltvt st0tFig. 3 Peak Level Meter Circuit- Positive peak current- llegatiYe peal current4.3 PROTECTION CIRCUITThe main purpose of the protection circuit is toprotect the

31、equipment and give an indication inthe event of malfunction, incorrect operation,faulty connections, or other causes.The block diagram of the protection circuit func-tions is shown in Fig. 6. The following descriptionis in reference to the dia$am.Relay and Lamp Driversq27 - Q30 form the relay drive

32、circuit (see Fig. 7).while Q31 drives the lamp. In normal operation,reverse bias is applied to Q27, maintaining it inthe cut off state. When an abnormality is detectedby the DC balance or temperature detector, currentflows through R1. Q27 base potential falls rapidlyand it switches ON. This causes f

33、orward biasvoltage to be applied to Q28, turning Q28 ON.Potential at point B drops, turning off Q29 andQ30. With Q29 OFF, current to relay RL5 is cutoff, tuming Q31 (lamp drive) ON and lighting theprotection lamp. Q30 cuts off the current to RL4and RL2 (when impedance switch is at 8Q; whenat 4Q, RL4

34、, RL6 and RL3).Because of RL4 off, output circuit of the poweramplifier becomes open, and the stages beyond thepredriver are stopped operation completely byRL5.RL2, RLg and RL6 are for changing the trans-former secondary taps when the impedance switchis selected and determining the value of the curr

35、entcontrol circuit in the power amplifier. They arethus not directly related to the protectiorr func-tion.Zener diodes D2 and DB fix the operating poten-tials of Q29 and Q30, and the difference in theirstarting points prevent misoperation.Power Switch ON MutingThis circuit also includes a delaying f

36、unction whenthe power switch is set to ON. The delay time isdetermined by R8 and C1 in the Q29 and Q30base circuits.Immediately after the power switch is turned ON,Q27 and Q28 are reverse biased by -B1 and -B2,and switched OFF. Point B potential from+B3passes through R8 and rises as Cl charges. Ther

37、ise time is determined by the time constant ofC1 and R8. When the potential exceeds D3(zener diode) zener voltage, Q30 is switched ONand current flows in the relay circuit connectedto Q30.In the same manner, when the potential at pointB exceeds D2 zener voltage, Q29 is switched ONand current flows i

38、n RL5. Correct voltage is thusapplied to the power amplifier.Fig. 6 Block Diagram of the Protection CircuitPower Switch OFF MutingSince +B3 normally passes from R7 to R6 andflows to -B.2, Q28 base is maintained at cut offpotential. When the power switch is tumed OFF,-B2 immediately ceases, since its

39、 time constant issmaller than +83. Consequently, +83 passesthrough Dl and is applied to Q28 base, tumingQ28 ON. Point B potential then falls rapidly,tuming Q27 and Q30 OFF.lmpedance Selector MutingWhen the impedance selector switch (S1) ischanged from 8Sl to 4Sl, uncharged capacitor C2is introduced

40、into the - 82 circuit, temporarilyreducing -B2 voltage. This causes Q28 to switchON, C1 to be discharged, and Q29 & Q30 to beswitched OFF.SPEG.ElAlthough Q28 switches OFF again, Q29 and Q30continue in the OFF condition for several secondswhile C1 is charging.Temperature DetectorThe temperature detec

41、tor employs positive coeffi-cient thermistors (posistors). These are temperaturesensitive elements possessing a positive temperatureresponse, rapidly increasing in resistance when acertain temperature is exceeded (see Figs. 8 & 9).The posistors (TH3 & TH4) are mounted on thepower transistor. If some

42、 abnormality increa.sesthe temperature to the posistor operating point,their resistance rapidly increases, reducing thepotential at point C. This allows DB to conduct,so that the potential at point D drops and Q27switches ON.q4o,2o4Apoint-Tem0erature t (Fig. 8 Posistor-temperature ResponseFig. 9 Tem

43、perature Detector CircuitDC Balance DetectorQ25 and Q26 make up a differential amplifier,as shown in Fig. 10. The inputs (bases) of thesetransistors are connected to the left and rightpower amplifier. If for some reason the DCbalance of the power stage is upset, a potentialdifference arises in the d

44、ifferential amplifier inputsignal, unbalancing q25 and Q26 collector currents.When one of the collector potentials becomeslower than Q27 base potential, this base potentialis dissipated through D1 or D2, q27 switches ON,and relay and lamp drives operate.r- -i itcllr - - - - - - - - J IIIL-:E-.iFig.

45、10 DC Balance Detector Circuit4.4 SURGE CURRENT SUPPRESSOR CIRCUITSA toroidal core power transformer is used in theSPEG2, which while possessing compactness anda large handling capacity, also exhibits extremelylow intemal resistance. In combination with thefour 15,000pF electrolytic capacitors formi

46、ng thepower supply, surge current accompanying powerswitch operation can reach a maximum of 3004.The power supply can therefore be damaged unlessprotective measures are taken.The main sources of surge current generation arepower transformer excitation current and powersupply electrolytic capacitor c

47、harging current.Two surge suppressor circuits are employed in theSPEC-2, one each in the primary and secondarypower transformer circuits. These circuits areshown in Fig. 11.Power transformer excitation current is handledby the relay surge suppressor circuit at theprimary side. When the power switch

48、is turnedON, the current passes through R2 & D1 andcharges C1, therefore it does not flow through therelay drive coil immediately, and RLl remainsOFF. The transformer excitation current flowsthrough R1 during this interval. After. C1 iscompletely charged, current flows in the RL1+83 drive coil switc

49、hing it ON, and R1 is shorted.The surge suppressor circuit in thesecondary side of the power trans-former is designed to handle theelectrolytic capacitor charging cur-rent. When the power switch isturned ON, RL2 and RLB remainOFF due to protection circuit op-eration. Consequently, the currentpasses

50、through R3 and R4, gradu-ally charging the electrolytic capaci-tors through a bridge type rectifiercircuit. RL2 or RLB is switched ONwhen charging has been completed,gving the normal operating mode.By employing these circuits, surgecurrent is limited to approximately40 A.tlectrolyticcapacitorPororam