HarmanKardon-DPR1005-avr-sch维修电路原理图.pdf

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1、31RadioFans.CN 收音机爱 好者资料库DPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon DPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon NOTE: Ordinarily the DPR1005/2005 SMPS Power Supply module is supplied only as a complete unit. Supplied Schematic and Parts list are included only for referen

2、ce when the above part is not available and/or repair to component level is necessary. For h/k part number equivalents, contact harman/kardon at 516-255-4545 ext. 6553113RadioFans.CN 收音机爱 好者资料库D P R 2 0 0 5 - O U T L E T - U S - M P 0 3 _ 0 4 1 9 . s c h - 1 - W e d M a y 1 2 1 5 : 1 6 : 0 8 2 0 0 4

3、114D P R 2 0 0 5 - F R O N T - M P 0 3 _ 0 4 1 9 . s c h - 1 - W e d M a y 1 2 1 5 : 1 5 : 2 6 2 0 0 4115D P R 2 0 0 5 - P R O C E S S O R - M P 0 2 _ 0 3 1 5 . s c h - 4 - W e d M a y 1 9 2 1 : 3 2 : 0 8 2 0 0 4116D P R 2 0 0 5 - P R O C E S S O R - M P 0 2 _ 0 3 1 5 . s c h - 3 - W e d M a y 1 9 2

4、 1 : 3 1 : 0 9 2 0 0 4117D P R 2 0 0 5 - P R O C E S S O R - M P 0 2 _ 0 3 1 5 . s c h - 5 - W e d M a y 1 9 2 1 : 3 5 : 3 5 2 0 0 4118D P R 2 0 0 5 - P R O C E S S O R - M P 0 2 _ 0 3 1 5 . s c h - 1 - W e d M a y 1 9 2 1 : 2 4 : 4 0 2 0 0 4119D P R 2 0 0 5 - P R O C E S S O R - M P 0 2 _ 0 3 1 5 .

5、 s c h - 2 - W e d M a y 1 9 2 1 : 3 0 : 2 5 2 0 0 4120D P R 2 0 0 5 - A M P - M P 0 3 _ 0 4 1 9 . s c h - 1 - W e d M a y 1 2 1 5 : 1 3 : 5 8 2 0 0 4121D P R 2 0 0 5 - A M P - M P 0 3 _ 0 4 1 9 . s c h - 2 - W e d M a y 1 2 1 5 : 1 4 : 3 0 2 0 0 4122D P R 2 0 0 5 - V I D E O - M P 0 2 _ 0 4 1 9 . s

6、 c h - 1 - W e d M a y 1 2 1 5 : 1 6 : 5 5 2 0 0 4123( 株) 光星電子技術部出 圖DPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 124( 株) 光星電子出 圖技術部DPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 125D P R 2 0 0 5 - W I R I N G - M P 0 3 _ 0 4 1 9 . s c h - 1 - W e d M a y 1 2 1 5 : 1 8 : 0 4 2

7、 0 0 4126Complete Class-D Amplifier Module Digital switching controller, driver & MOSFET output stage, output filter stage Designed for compliance with FCC, UL, CSA, CE requirementsHigh-Performance Sound 70 watts per channel into 8 ohms (FTC) 96 dB Dynamic Range 90% Efficient Internal heat sinkConfi

8、gurable Audio Processing Treble, Bass, Volume Control, and EQ per channel Dynamic range compression and output limiting Standard 2-wire serial interface controlled via micro controller or remote PC GUIPure Digital Path 8-channel digital audio inputs (32 -192 kHz, 16-24 bit) are mapped to 7 speaker o

9、utput channelsGraceful Protection and Recovery Short-circuit, thermal, over-current faultsPowered Second Zone Dynamic configuration for 7 channels or 5 channels plus stereo second zone. 2-channel analog or independent rate digital input selection for second zoneThe D2AudioTM GR70 is a fully self-con

10、tained 70 watts per channel digital amplifier module. The module enables rapid system design for manufacturers of home theater components. The GR70 contains a high-performance digital switching controller, MOSFET output stages, and high-quality output filter stages. The module is encased in an EMI-s

11、hielded package and tested for compliance with agency regulations to assist FCC Class-B, UL, CSA, and CE certification. The GR70 is capable of driving up to 7 channels at 70 watts into an 8-ohm load with all channels driven per FTC specifications.A configurable audio signal processor provides equali

12、zation, volume control, tone control, compression, and limiting.A powered second zone allows for a fully independent amplifier zone. The amplifier can be dynamically configured as 7 channels or 5 channels with a stereo second zone. The second zone supports a stereo analog input or a fully independen

13、t digital audio input. A separate digital audio output is also provided for the primary channels. D2AUDIO GR70Complete digital amplifier for home theater components70 watts/channelUp to 7 channelsPure digital audio signal path96dB dynamic rangeConfigurable audio processingPowered 2nd Zone90% efficie

14、ntGraceful protection and recovery GR70 (DPR1005) DATA SHEETSDPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 36CONSUMERGR70 Data Sheet Aug 26, 2003 v1.823SPECIFICATIONS3.1ABSOLUTE MAXIMUM RATINGS 3SPECIFICATIONS3.1ABSOLUTE MAXIMUM RATINGS Operation at or beyond the Absolute Maximum Ratings

15、 may result in permanent damage. Normal operation outside of the limits defined in this specification is not implied. 3.2ELECTRICAL CHARACTERISTICS3.2ELECTRICAL CHARACTERISTICSTA = 25 C, HV=38V, LV=12V, SV=7.5V, Ground = 0VParameterConditionMin MaxUnitHigh Voltage Supply (HV)+38V DC Supply 40VLow Vo

16、ltage Supply (LV)+12V DC Supply 12.5VSignal Voltage Supply (SV)+7.5V DC Supply 8.0VDigital Input Signal Level1MCLK, SCLK,LRCLK,SDI4:1, Z2_MCLK, Z2_LRCK, Z2_ SCLK, Z2_SDI, SDA, SCL, /PWRDWN, /RESET, Z2_EN, Z2_AD, MD0, MD1 -0.6 3.90VAnalog Input Signal Level2Peak to peak AC voltage 5VInput Current, an

17、y pin but supplies +/-10mAOperating Temperature Range 0 50CStorage Temperature Range-20 60CLead TemperatureSoldering 10 Seconds 300CMechanical ShockAny Axis non repetitive TBDGMechanical ShockAny Axis Repetitive TBDGElectrostatic DischargeMachine Model TBDkVNote 1: -0.6V undershoots and 3.9V oversho

18、ots allowed for 4ns maximumNote 2: Analog inputs are terminated with 10k ohms to analog ground, then AC coupled internallyTABLE 2: Absolute Maximum RatingsSymbolConditionMin Typ MaxUnitVIL 0.8VVIHInputs except /RESET and /PWRDWN 2.0VVIH/RESET and /PWRDWN 3.0VVOH2 mA Load 2.4VVOL2 mA Load 0.4VILInput

19、 Leakage - CMOS pins MCLK, LRCLK, SCLK, SDI, Z2_MCLK, Z2_LRCLK, Z2_SCLK, Z2_SDI +/-10uAICInput current on digital inputs with resistive pulls - /PWRDWN, /RESET, Z2_EN, Z2_AD_EN, MD0, MD1, SDA, SCL +/-0.4mARIAnalog input resistance - all analog audio inputs 10k OhmsZSAnalog source output impedance 10

20、0OhmsTABLE 3: Electrical CharacteristicsDPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 37CONSUMER5GR70 Data Sheet Aug 26, 2003 v1.823.3PERFORMANCE CHARACTERISTICS3.3PERFORMANCE CHARACTERISTICSResistance load = 8, HV=38V, LV=12V, SV=7.5V 3.4DC POWER REQUIREMENTS 3.4DC POWER REQUIREMENTS TA

21、 = 25C, HV=38V, LV=12V, SV=7.5V, Ground = 0VSpecificationConditionMin Typ MaxUnitOutput PowerAll channels driven, FTC3 70 70WFrequency Response20 Hz to 24 kHz, at 1W output power -0.5 0.5dBDynamic Range-60 dB input 1kHz -96dBOutput Distortion (THD+N)20 Hz to 24 kHz, at 1W output power, MPC control b

22、it off 0.12 0.15%Note 3: FTC spec: 30 minute pre-soak at 1/8th power, full power for 5 minutes, all channels driven simultaneously. TABLE 4: Performance CharacteristicsSymbolDescriptionConditionMin Typ MaxUnitHV4High Voltage Supply 38V+12VDC+12V Supply11.75 12 12.5V+7.5VDC+7.5V Supply7.0 7.5 TBDVTsr

23、HVHigh Voltage Supply Slew Rate See Chapter 5.8 20V/SHVHigh Voltage SupplyAll channels at full power output 18 TBDA+12VDC+12V Supply TBD 1.0A+7.5VDC+7.5V Supply TBD 0.85AHVHigh Voltage Supply/PWRDWN asserted TBD TBDA+12VDC+12V Supply TBD 1.0A+7.5VDC+7.5V Supply TBD 0.85ANote 4: The peak current requ

24、irement for the HV power supply is dependent on the overall system power output specification. The GR70 is designed to meet FTC power amplifier specifications for a sine wave continuous power measurement with all chan-nels driven. Under normal conditions for most applications, all channels may not n

25、eed to be driven at full power simultaneously. More typically, the power output requirement is 1/8 to 1/3 of the total amplifier output. However, if the amplifier is allowed to be driven into high distortion (“clipping”), the power supply current may approach 20% more than required for a full scale

26、out-put. It is therefore up to the system designer to determine how much power output the module will be allowed to produce, and hence determine the maximum and average power supply current requirements.TABLE 5: DC Power RequirementsSpeakerOutputs1-7ControllerPwr FET 7Pwr FET 2Pwr FET 1Filter 7Filte

27、r 2Filter 1GR ModuleDriver 7Driver 2Driver 1Digital AudioOutHV SupplyADC2-Wire Serial Control/RESETZone Control/PWRDWNZone 2 AnalogPrimary Digital AudioZone 2 Digital AudioOutput Protection+12V Supply+7.5V Supply/ERRORDPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 38CONSUMERGR70 Data Shee

28、t Aug 26, 2003 v1.823.5SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT3.5SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTTA = 25C, HV=38V, LV=12V, SV=7.5V, Ground = 0VThe second zone inputs Z2_SCLK, Z2_LRCLK and Z2_SDI have the same timing characteristics as the primary serial audio inputs. The Z2_LRCLK

29、and Z2_SDI input timings are referenced to Z2_SCLK. FIGURE 1: Serial Audio Port TimingSymbolDescriptionMin Typ MaxUnittcSCLKSCLK frequency 12.5MHztwSCLKSCLK pulse width (high and low40nstsLRCLKLRCLK setup to SCLK rising20nsthLRCLKLRCLK hold from SCLK rising20nstsSDISDI setup to SCLK rising20nsthSDIS

30、DI hold from SCLK rising20nstdSDOSDO1-4 delay from SCLK falling 20nsTABLE 6: Serial Audio Port TimingtcSCLKLRCLKSCLKSDISDO1-4thLRCLKtsLRCLKtsSDItdSDOthSDItwSCLKtwSCLKDPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 39CONSUMER7GR70 Data Sheet Aug 26, 2003 v1.823.6SWITCHING CHARACTERISTICS -

31、CONTROL PORT3.6SWITCHING CHARACTERISTICS - CONTROL PORTTA = 25C, HV=38V, LV=12V, SV=7.5V, Ground = 0V FIGURE 2: Control Port TimingSymbolDescriptionMin MaxUnitfSCLSCL frequency 100kHztbufBus free time between transmissions4.7ustwSCLSCL clock low4.7ustwSCLSCL clock high4.0ustsSTASetup time for a (rep

32、eated) Start4.7usthSTAStart condition Hold time4.0usthSDASDA hold from SCL falling (see note)0ustsSDASDA setup time to SCL rising250nstdSDASDA delay time from SCL falling 3.5ustrRise time of both SDA and SCL 1ustfFall time of both SDA and SCL 300nstsSTOSetup time for a Stop condition4.7usNote: Data

33、must be held sufficient time to bridge the 300ns transition time of SCLtdSDOSDO1-4 delay from SCLK falling 20nsTABLE 7: Control Port TimingtwSCLSCLSDA(input)tsSTAthSTAtrtftsSDAthSDAtsSTOtbufSDA(output)tdSDADPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 40CONSUMERGR70 Data Sheet Aug 26, 20

34、03 v1.823.7PERFORMANCE PLOTS3.7PERFORMANCE PLOTSThe following graphs show the amplifiers performance. All inputs are driven with the same input signal, all outputs are mapped to their respective input with unit gain. The output channels are tested one at a time and only the output channel being meas

35、ured has a load. The other outputs are open.3.7.1FREQUENCY RESPONSE AT 1W (83.7.1FREQUENCY RESPONSE AT 1W (8 LOAD)LOAD) Conditions: Typical supplies, Room temperature, 1W output power FIGURE 3: Frequency Response 3.7.2THD+N VS. FREQUENCY (83.7.2THD+N VS. FREQUENCY (8 LOAD) LOAD) Conditions: Typical

36、supplies, Room temperature, 1W output power FIGURE 4: THD+N vs. Frequency-3+3-2.75-2.5-2.25-2-1.75-1.5-1.25-1-0.75-0.5-0.25-0+0.25+0.5+0.75+1+1.25+1.5+1.75+2+2.25+2.5+2.75dBrA2020k501002005001k2k5k10kHz0.01100.020.050.10.20.5125%2020k501002005001k2k5k10kHzDPR1005/DPR2005 harman/kardonPR1005/DPR2005

37、harman/kardon 41CONSUMER9GR70 Data Sheet Aug 26, 2003 v1.823.7.3THD+N VS. OUTPUT POWER (83.7.3THD+N VS. OUTPUT POWER (8 LOAD) LOAD) Conditions: Typical supplies, Room temperature, 1kHz digital input FIGURE 5: THD+N vs. Power0.020.50.040.060.080.10.120.140.160.180.20.220.240.260.280.30.320.340.360.38

38、0.40.420.440.460.48%100m100200m500m125102050WDPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 42CONSUMERGR70 Data Sheet Aug 26, 2003 v1.824MODULE PINOUT4MODULE PINOUTMCLKDGNDSCLKLRCLKDGNDSDI1SDI2SDI3SDI4DGNDZ2_MCLKZ2_SCLKZ2_LRCLKZ2_SDISDASCL/PWRDWN/RESET/ERRORZ2_ENDGND+12VDGND+7.5V789101112

39、131415161718192021222324252627282930123456SCLKOSDO1SDO2SDO3SDO4LRCLKOZ2_AD_LZ2_AD_RAGNDZ2_AD_ENMD0MD1313233343536605958575655545352515049484746454443424140393837TOP VIEWGR70CH1_OUT+CH1_OUT-CH2_OUT+CH2_OUT-CH3_OUT+CH3_OUT-CH4_OUT+CH4_OUT-+40VDC+40VDC+40VDC+40VDCPWR_GNDPWR_GNDPWR_GNDPWR_GNDCH5/Z2L_OUT

40、+CH5/Z2L_OUT-CH6Z2R_OUT+CH6/Z2R_OUT-CH7_OUT+CH7_OUT-N.C.N.C.DPR1005/DPR2005 harman/kardonPR1005/DPR2005 harman/kardon 43CONSUMER11GR70 Data Sheet Aug 26, 2003 v1.824.1PIN DESCRIPTIONS 4.1PIN DESCRIPTIONS Pin #Pin NameI/ODescription1SCLKOOOutput Shift Clock2SDO1OChannel 1,2 I2S Output Data3SDO2OChann

41、el 3,4 I2S Output Data4SDO3OChannel 5,6 I2S Output Data5SDO4OChannel 7,8 I2S Output Data6LRCLKOOOutput Left / Right Clock7MCLKIMaster System Clock9SCLKISerial Data Shift Clock10LRCLKILeft / Right Clock12SDI1IChannel 1,2 I2S Input Data13SDI2IChannel 3,4 I2S Input Data14SDI3IChannel 5,6 I2S Input Data

42、15SDI4IChannel 7,8 I2S Input Data17Z2_MCLKIZone 2 Master System Clock18Z2_SCLKIZone 2 Serial Data Shift Clock19Z2_LRCLKIZone 2 Left / Right Clock20Z2_SDIIZone 2 Channel 1,2 I2S Input DataTABLE 8: Digital Signal PinsPin #Pin NameI/ODescription21SDAI/O2-Wire Serial Control Interface Data and Address22

43、SCLI/O2-Wire Serial Control Interface Clock23/PWRDWNIAmplifier Disable 24/RESETIAmplifier Internal Reset25/ERROROAmplifier Internal Error26Z2_ENIZone 2 Enable34Z2_AD_ENIZone 2 A/D Enable35MD0IMode Control Enable 036MD1IMode Control Enable 1TABLE 9: Control Signal PinsPin #Pin NameI/ODescription37NCO

44、No Connection - make no external connection to this pin38NCONo Connection - make no external connection to this pin39CH7-OChannel 7 Minus Speaker Output40CH7+OChannel 7 Plus Speaker Output41CH6/Z2R-OChannel 6 or Zone 2 Right Minus Speaker Output42CH6/Z2R+OChannel 6 or Zone 2 Right Plus Speaker Outpu

45、t43CH5/Z2L-OChannel 5 or Zone 2 Left Minus Speaker Output44CH5/Z2L+OChannel 5 or Zone 2 Left Plus Speaker Output53CH4-OChannel 4 Minus Speaker Output54CH4+OChannel 4 Plus Speaker Output55CH3-OChannel 3 Minus Speaker Output56CH3+OChannel 3 Plus Speaker OutputTABLE 10: Speaker Output PinsDPR1005/DPR20

46、05 harman/kardonPR1005/DPR2005 harman/kardon 44CONSUMERGR70 Data Sheet Aug 26, 2003 v1.824.2PIN DEFINITION4.2.1ZONE 2 ANALOG INPUTS4.2PIN DEFINITION4.2.1ZONE 2 ANALOG INPUTSZ2_AD_R,LZone 2 Analog InputsThis is the Zone 2 analog input. The Z2_AD_R,L are independent analog inputs for the second audioz

47、one. The inputs are selected when the amplifier is configured for Mode 2 and the Z2_AD input is SetHigh. See Chapter 5 for additional information.The A/D convertor is fixed at a 48kHz sample rate with a2.0V rms input level.4.2.2DIGITAL AUDIO INPUTS4.2.2DIGITAL AUDIO INPUTSMCLKMaster System ClockThis

48、 pin is the master clock input for the primary channels on SDI4:1. The master clock must be aninteger multiple of the LRCLK frequency. The default master clock is 12.288 MHz which corresponds to a48 kHz sample rate (Fs) * 256. The MCLK is a 3.3 volt input.LRCLKLeft/Right ClockThis pin is the framing

49、 clock for the primary channels on SDI4:1. The serial input data is transmitted astwo channels every sample rate period. The LRCLK determines the start of each data pair. The LRCLKfrequency determines the input sample rate (Fs). The LRCLK is a 3.3 volt input.SCLKShift ClockThis pin is the Shift Cloc

50、k input for the primary channels on SDI4:1. The serial clock is used to frameeach input bit of the serial input data. The shift clock frequency is typically 64*Fs. The SCLK is a 3.3 voltinput.SDI4:1Serial Data InputThese pins are the Serial Data input for the primary channels. Serial Data is arrange