CAudio-XR3801-pwr-sm维修电路原理图.pdf

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1、XR3801 Circuit Description and Service NotesIntroductionThese notes are intended to assist maintenance and service of the XR3801 amplifier. It is recommended that reference ismade to the relevant schematic diagrams and system diagram whilst reading this document.The component references of the two a

2、mplifier channel electronics are appended “A” and “B” respectively. Shared circuitry(such as that of the protection system) has no suffix. This document will refer to channel A references only. Operation ofchannel B is identical except where explicitly noted. Voltage values in bold mentioned in the

3、text are test voltages whichmay be used for diagnostic purposes, although attention is drawn to the surrounding text which explains circuit operationand may qualify such measurements.Mechanical ConstructionThe mechanical structure of the unit is made up of two identical side panels, a rear panel, an

4、d a 3mm steel structural frontpanel. The rear panel is fixed to the side panels by means of six M5 screws (three each side) which also secure the tworear rack mounting brackets.The front panel is fixed to the side panels by means of two side fixing brackets secured to the front by way of the handles

5、crews and to the sides by three M5 screws each side.The main circuit board is fixed to the two heatsinks by the power device fixing screws and is spaced from the circuit boardby way of insulating bushes. The circuit board/heatsink assembly is fixed to the rear and side panels by a total of eight M5s

6、crews.The mains transformer is supported on the internal “transformer tray” which is fixed directly to the structural front panel.The extruded cosmetic front panel is fixed directly to the structural front panel by two M5 screws.Top and bottom covers complete the assembly each fixed in place by eigh

7、t M4 screws.Access to all the major components may be gained by removal of the top and bottom covers, further disassembly is rarelyrequired.Circuit descriptionInput StageThe input stage is built around TL071 operational amplifier IC1A, configured as a unity-gain differential amplifier. Its correctop

8、eration is dependent upon both of its input terminals being correctly terminated and, therefore, any gain errors around thisstage may be a result of a fault in the screened cable connection to the input PCB P1030. Preset potentiometer VR2Aadjusts the gain of this stage and thereby provides adjustmen

9、t to optimise the Common-Mode-Rejection of the input stage.This preset is factory set for optimum rejection and should not be re-adjusted unless it has been necessary to change anycomponents around the input stage.The trimming procedure is as follows :Inject a common-mode test signal at 1kHz and +4d

10、Bu to the channel under test. The common-mode test signal of the AudioPrecision test system is suitable, otherwise connect the signal to both pins 2 & 3 via 51 Ohm resistors. Observe theamplifier output and adjust VR2A for minimum output.Power for the input stage is derived from the main +LT supply

11、via 1W resistors R101A and R102A and shunt regulated to anominal +18V by D22A and D23A.The output of the input differential amplifier is fed via 1k “Build-out” resistor R57A and twin screen cable to the front panellevel control and the returns via the “blue” core of the same cable to the main PCB to

12、 be fed to the power amplifier stage.Power AmplifierRadioFans.CN 收音机爱 好者资料库The power amplifier consists of a fairly conventional Class A driver stage driving a Class AB MOS-FET output stage withClass H supply rail modulation. Each stage will be dealt with individually.Class A DriverThe input signal

13、returned from the level control is fed via DC blocking capacitor C53A and R59A. DC bias current for theClass A input stage is supplied via R60A, whilst 330pF capacitor C54A prevents any extreme high frequency input signalsfrom reaching the power amplifier and also provides a low source impedance at

14、high frequencies to ensure frequencystability.The first stage of the Class A driver consists of TR52A and TR53A configured as a long tailed pair differential amplifier.Emitter resistors R62A and R63A de-sensitise the performance of the input stage to parametric variations of the two inputtransistors

15、. The quiescent current for the input stage is delivered by current source TR51A. Diodes D11A and D12Aprovide a reference voltage of approximately 1.3V which is applied to the base of TR51A. Approximately half of this (0.65V)will then appear across R61A (330R) which then sets the current sourced fro

16、m TR51A collector at approximately 2mA. Inthe quiescent state half of this current is driven through TR52A and TR53A. Hence the voltage dropped across emitterresistors R62A and R63A will be approximately equal at 100mV.The collector currents of TR52A and TR53A are fed via R67A and R68A to R69A and R

17、70A respectively. Hence, in thequiescent state, R69A and R70A should each exhibit a voltage drop of 2.7V or so.Overall voltage feedback of the amplifier is derived through R64A and R66A. R65A and C55A connected in parallel withR64A provide phase lead compensation to maintain good amplifier frequency

18、 stability, and a fault in either of thesecomponents may result in RF signals being present at the output, or in unusually high distortion. C56A connected in serieswith R66A gives 100% DC feedback to minimise any DC offset at the output. The resultant feedback signal is applied to thebase of TR53A.U

19、nder normal conditions the signals at the bases of TR52A and TR53A will be identical. However, under fault conditions,such as a DC offset at the output, the base voltages will become offset also. For example, in the event of a large DC offsetof +50V at the output a positive DC voltage will appear at

20、 the feedback point and hence at the base of TR53A. Although thiswould, in theory, be the full +50V, owing to C56A being rated at only 25V, the voltage will, in practice, be somewhat lower.However, the important issue is that the voltage is positive. In the event the voltage is negative this indicat

21、es that thefeedback network is faulty (most likely R64A itself).The voltage at TR53A base being positive whilst the base of TR52A is close to 0V will then reverse bias TR53A base-emitterhence turning off the transistor. Hence, no voltage should appear across R63A and R70A whilst double the normal vo

22、ltagewill appear across R62A and R69A (200mV and 5.4V respectively). Should this not be the case, it indicates a fault in theinput stage itself.The output of the input long-tailed-pair (i.e. the voltages across R69A and R70A) are fed to a second long-tailed-pair TR56Aand TR57A. The bias current for

23、this stage is set by current source TR58A. The base current for TR58A is fed throughR72A. TR59A senses the voltage across the emitter resistor of TR58A R77A and “robs” TR58A of base current to maintainapproximately 650mV across R77A. Hence the collector current of TR58A is set at approximately 4.3mA

24、 which is sharedequally between TR56A and TR57A. C58A and C62A provide Miller Feedback around TR56A and TR57A respectively.These capacitors set the dominant pole of the amplifier frequency response, and are therefore critical for amplifier stability.It should also be noted that either of these capac

25、itors becoming “leaky” (difficult to measure in circuit) will result in a DCoffset at the output.The collector of TR57A drives the positive output more-or-less directly (more detail later) whilst the collector of TR56A drivescurrent mirror TR54A/TR55A via R76A. In the quiescent state R76A will show

26、a voltage drop of around 22V, and thecurrent mirror emitter resistors R74A R73A and will show equal voltage drops of 320mV. Hence, for the same +50V DCoffset, described earlier, one would expect no voltage drop across any of R76A, R73A or R74A, indicating that the feedbackis attempting to correct th

27、e fault. Likewise, for a negative DC offset one would expect these voltages to be twice their usualvalue. If this is not the case then the second stage (TR54A-TR59A) is at fault.The loads for TR57A and TR55A are formed by Bootstrapped current sources TR60A/TR61A and TR63A/TR64Arespectively. Operatio

28、n of the two current sources is, in principal, identical so the upper current source TR60A/TR61A onlywill de described. The load current is sourced from the collector of TR61A, its base being biased through R80A. Thevoltage across emitter resistor R79A is sensed by TR60A which then “robs” TR61A of b

29、ase current to maintain a voltagedrop across R79A of approximately 650mV. This sets the collector current of TR61A at approximately 4.3mA. Thecurrent source is connected to the +HT rail via R78A. The current through R78A is the sum of TR61A collector current(4.3mA) and the current through R80A (5mA)

30、 and, therefore, 43V will be developed across R80A. Capacitors C63A andRadioFans.CN 收音机爱 好者资料库C64A Bootstrap the current source end of R78A to the output. Therefore, with signal applied, the voltage at this point will beapproximately 100V DC with the output signal superimposed upon it.The outputs of

31、 the two current sources TR61A and TR63A are fed through D13A and D14A to vbe multiplier circuit TR62A,which sets the output stage bias. The bias voltage is defined by R81A, R82A and VR1A which is factory preset for thecorrect bias setting of 350mV measured between the emitters of TR65A and TR66A.Di

32、ode/Zener clamps D15A-D18A limit the maximum gate to source voltage applied to the output stage thereby setting acurrent limit for protection of the output stage. Units fitted with P1042 re-entrant protection daughter boards connecttransistors TR1 and TR2 across D16A and D17A respectively. The turn-

33、on of these two transistors is controlled so as toreduce the allowed Gate to Source voltage as the Drain to Source voltage increases, thereby providing closer protection ofthe output stage.Emitter followers TR65A and TR66A buffer the Class A driver stage in order to provide more current to drive the

34、 outputstage. Although the MOS-FET output stage has very high input resistance, requiring little current, the parasitic capacitanceswill impair its performance without the addition drive current available.Output StageThe output stage consists of four tiers of seven output devices connected in parall

35、el. TR8A-TR14A form the negative half ofthe Class AB output stage, whilst TR15A to TR21A form the positive half. Each device has a gate “stopper” resistor R8A-R21A and a Gate to Drain Miller capacitor C8A-C21A which prevent parasitic oscillation of the output stage.The supply for the output stage is

36、 fed from the +LT rails (approximately 70V) via D6A and D7A for the positive and negativehalves respectively. In addition, the upper tiers of devices TR1A-TR7A and TR22A-TR28A modulate the supply to a voltageapproximately 20V greater than the output voltage when the output approaches or exceeds the

37、70V LT supply. There aretwo important advantages to this system. Firstly, in the “Off” state the output stage is fed from a 70V supply, which reducesthe breakdown voltage requirements for the output stage. Secondly, as the power dissipation in a Class AB output stage isproportional to the square of

38、the supply voltage, for small (-6dB or lower) output signals, the power dissipation is a quarter ofwhat it would be with a conventional design.The upper tiers of the output stage are driven from TR29A-TR32A, TR37A and TR38A for the positive side, and fromTR33A-TR36A, TR39A and TR40A for the negative

39、 side. The operation of each half is, in principal, identical so the positivedriver only will be described.The Class H driver consists of two current sources TR29A/TR30A and TR31A/TR32A. TR29A/TR30A operate from the +HTsupply and are set to source approximately 2mA. TR31A /TR32A operate from the out

40、put signal and are set at 4.3mA.When operating correctly, 650mV will be developed across each of R32A and R33A. Zener diode ZD2A is connectedbetween the two current sources and will normally show a voltage drop of 20V. Zener diode ZD1A is connectedbetween the Cathode of ZD2A and the output of the up

41、per tier of output devices. Hence, in the quiescent state, theCathode voltage, with respect to 0V, of ZD1A will be approximately +70V, and the Anode to Cathode voltage will beapproximately 650mV. As the two current sources are unbalanced, the lower source will obtain 2mA of its 4.3mA from theupper c

42、urrent source and the remaining 2.3mA of current through ZD1A, thereby biasing the upper tier of the output stageinto the off state. As the output voltage increases, less voltage will be dropped across TR32A as it maintains its 4.3mA ofcollector current. When the output voltage reaches approximately

43、 20V below the +LT rail TR32A will become saturated andthe voltage at the Cathode of ZD2A will begin to increase, biasing the upper tier of output devices into the on state.Transistors TR37A and TR38A are configured as emitter followers to increase the drive current available to the output stage.Hen

44、ce the gate drive applied to the upper tier of devices will follow the output with an additional 20V of DC offset.Faults in the Output StageOutput device failure is usually in one of three modes.A)Device short Drain to SourceB)Device short Gate to SourceC) Device open Drain to SourceFailure mode A)

45、is usually exhibited as a DC offset at the output (or if the device is in the upper tier of devices as themodulated rail being “stuck” at the full +140V). Such a fault will be revealed as a Drain to Source short circuit across theoffending tier of devices. To identify which device(s) is faulty measu

46、re the resistance between Gate and Source of eachdevice in the faulty tier with the multi-meter set to its 2kOhm range. A faulty device will show as a resistance measurementof less than 1k1 (usually 0-100 Ohms).Failure modes B) and C) will be exhibited as premature clipping on one half-cycle of the

47、output. This fault will not, however,be shown with the amplifier unloaded. In the event the fault persists with no load connected, the fault is likely to beelsewhere. Devices suffering from failure mode B) can be easily identified with the simple multi-meter test outlined above.Failure mode C) is a

48、little more difficult to identify. The simplest method is to connect a “wander” lead to the Sourceconnection of the offending tier of devices. Touch each gate lead of that tier of devices with the “wander” lead in turnobserving the output waveform. Each time a device is shorted Gate to Source the cl

49、ipping will become more pronounced. Afaulty device will be revealed by less dramatic additional clipping.Multimeter Testing of Output DevicesOnce a device has been removed from circuit it is comparatively simple to check whether it is operating correctly. Thefollowing routine is for an N-Channel (K1

50、058) device. The routine for testing a P-Channel device is identical with Red andBlack leads swapped.Set the Multi-Meter to its 200 Ohm range. Connect the Black test lead to the (centre) Source lead of the device under testand the Red test lead to the (left) Gate lead of the device under test. The m