Onkyo-HTX22HD-sur-sm维修电路原理图.pdf
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1、HTX-22HD SERVICE MANUALSERVICE MANUAL RC-720S DIGITAL SURROUND SYSTEM Black model MODEL HTX-22HD(B) 230V AC, 50HzB MPB Ref. No. 4073 062008 SAFETY-RELATED COMPONENT WARNING! COMPONENTS IDENTIFIED BY MARK ON THE SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK.
2、 REPLACE THESE COMPONENTS WITH ONKYO PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL. MAKE LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY INSULATED FROM THE SUPPLY CIRCUIT BEFORE RETURNING THE APPLIANCE TO THE CUSTOMER. RadioFans.CN 收音机爱 好者资料库 HTX-2
3、2HD EXPLODED VIEWS-1 AMPLIFIER SECTION HTX-22HD A01 A30 A110 P8001 A39 A32 A24 A62 Q5001A Refer to PC Board parts list A45 A134 A130 A21 A22 L=65mm A22 L=40mm U03 U01 U10 U09 U11b U08b U05 U02 U04 U06 U07b A12 A24 A24 A101 E889 E890 E890 F901 T901 A06 x 5pcs A42 x 5pcs A08 x 4pcs A06 x 4pcs E892 x 2
4、pcs A08 x 3pcs A24 x 2pcs A34 x 2pcs A20 x 4pcs A105 x 15pcs A106 x 3pcs A23 x 6pcs A24 x 2pcs A24 x 2pcs A107 x 4pcs A108 x 4pcs A800 L=150mm A132 L=150mm A132 L=150mm A16 x 2pcs Refer to EXPLODED VIEWS-2 RadioFans.CN 收音机爱 好者资料库 HTX-22HD EXPLODED VIEWS-2 SPEAKER SECTION HTX-22HD SP12 SP08 SP01 SP05
5、 x 4pcs SP13 (With SP14) SP14 (Badge) SP09 x 2pcs L=35mm SP11 x 2pcs L=85mm SP10 L=95mm SP06 x 5pcs SP15 -Rear- Refer to EXPLODED VIEWS-1 HTX-22HD EXPLODED VIEWS-3 FRONT SPEAKER (HTX-22HDST) HTX-22HD SP22 (With SP23) SP23 SP22 (With SP23) SP23 - - - - - SP21 (L CDIN is the input data line for contro
6、l port interface in SPI mode. 2 3 4 51 5 52 6 7 8 9 HTX-22HD TERMINAL DESCRIPTION IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -8 Q301 : CS42518 (8-ch CODEC with S/PDIF Receiver) -3/4 NamePin No. Function AD0/CS10Address Bit 0 (I2C)/Control Port Chip Select (SPI) (INput) - AD0 is a chip address pin i
7、n I2C mode; CS is the chip select signal in SPI mode. INT11Interrupt (Ountput) - The CS42518 will generate an interrupt condition as per the Interrupt Mask register. RST12Reset (Input) - The device enters a low power mode and all internal registers are reset to their default settings when low. AINR-
8、 AINR+ 13 14 Differential right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma modulators via the AINR+/- pins. AINL- AINL+ 15 16 Differential right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma modulators via the AINR+
9、/- pins. VQ17Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage. FILT+18Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. REFGND19Reference Ground (Input) - Ground reference for the internal sampling circuits. AO
10、UTA1 +, - AOUTB1 +, - AOUTA2 +, - AOUTB2 +, - AOUTA3 +, - AOUTB3 +, - AOUTA4 +, - AOUTB4 +, - 36, 37 35, 34 32, 33 31, 30 28, 29 27, 26 22, 23 21, 20 Differential Analog Output (Output) - The full-scale differential analog output level is specified in the Analog Characteristics specification table.
11、VA VARX 24 41 Analog Power (Input) - Positive power supply for the analog section. AGND25 40 Analog Ground (Input) - Ground reference. Should be connected to analog ground. MUTEC38Mute Control (Output) - The Mute Control pin outputs high impedance following an initial power -on con- dition or whenev
12、er the PDN bit is set to a 1, forcing the codec into power -down mode. The signal will remain in a high impedance state as long as the part is in power-down mode. The Mute Control pin goes to the selected active state during reset, muting, or if the master clock to left/right clock frequency ratio i
13、s incorrect. This pin is intended to be used as a control for external mute circuits to prevent the clicks and pops that can occur in any single supply system. The use of external mute circuits are not manda- toy but may be desired for designs requiring the absolute minimum in extraneous clicks and
14、pops. LPFLT39PLL Loop Filer (Output) - An RC network should be connected between this pin and ground. RXP7/GPO7 RXP6/GPO6 RXP5/GPO5 RXP4/GPO4 RXP3/GPO3 RXP2/GPO2 RXP1/GPO1 42 43 44 45 46 47 48 S/PDIF Receiver Input/ General Purpose Output (Input/ Output) - Receiver inputs for S/PDIF encoded data. Th
15、e CS42518 has an internal 8:2 multiplexer to select the active receiver port, according to the Receiver Mode Control 2 resister. These pins can also be configured as general purpose output pins, ADC Overflow indicators or Mute Control outputs according to the RXP/General Purpose Pin Control resister
16、s. RXP049S/PDIF Receiver Input (Input) - Dedicated receiver input for S/PDIF encoded data. TXP50S/PDIF Transmitter Output (Output) - S/PDIF encoded data output, mapped directly from one of the receiver inputs as indicated by the Receiver Mode Control 2 resister. VLP53Serial Port Interface Power (Inp
17、ut) - Determines the required signal level for the serial port interfaces. SAI_SDOUT54Serial Audio Interface Serial Data Output (Output) - Output for twos complement serial audio PCM data from the S/PDIF incoming stream. This pin can also be configured to transmit the output of the inter- nal and ex
18、ternal ADCs. RMCK55Recovered Master Clock (Output) - Recovered master clock output from the External Clock Reference HTX-22HD TERMINAL DESCRIPTION IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -9 Q301 : CS42518 (8-ch CODEC with S/PDIF Receiver) -4/4 NamePin No. Function CL_SDOUT56CODEC Serial Data Out
19、put (Output) - Output for twos complement serial audio data the internal and external ADCs. ADCIN1 ADCIN2 58 57 External ADC Serial Input (Input) - The CS42518 provides for up two external stereo analog to digital converter inputs to provide a maximum of six channels on serial data output line when
20、the CS42518 is placed in One Line mode. OMCK59External Reference Clock (Input) - External clock reference that must be within the ranges specified in currently active on the serial audio data line. SAI_LRCK60Serial Audio Interface Left/Right Clock (Input/Output) - Determines which channel, Left of R
21、ight, is currently active on the serial audio data line. SAI_LRCK61Serial Audio Interface Serial Clock (Input/Output) - Serial clock for the Serial Audio Interface. HTX-22HD IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -10 Q5501 : R2S15211FP (8 ch Electronic Volume and 11 Input Selector and Tone Cont
22、rol) -1/3 SYSTEM DIAGRAM Lout REC Lch Rout Input ATT Out L for ADC REC AGND Out R for ADC Rch AVCC Multi Rin Multi Lin 3 4 5 6 7 8 9 1 2 Tone Rch Tone Bass & Treble Lch Tone 10 11 3 4 5 6 7 8 9 1 2 10 11 SLout Multi SLin Multi SRin Cout SWout Multi Cin Multi SWin SBLout Multi SBLin Multi SBRin AVEE
23、SUB SUB MCU I/F CLOCKDATA Bass & Treble Volume Volume Input ATT mono SBRout SRout Volume Volume Volume Volume Volume Volume Volume Volume Input selectorInput selector Volume Volume HTX-22HD IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -11 Q5501 : R2S15211FP (8 ch Electronic Volume and 11 Input Select
24、or and Tone Control) -2/3 BLOCK DIAGRAM AGND 5-C AGND 3-C AGND 1-C CLOCK AVCC INLB/RECL2 INRB/RECR2 INR11/RECR5 INL10/RECL4 RECR3 INL11/RECL5 FLIN1 RECL3 CIN1 FRIN1 SLIN1 SWIN1 ADCL ADCR FLIN2 FRIN2 SLIN2 SRIN2 CIN2 SWIN2 SBLIN2 SBRIN2 BASSR2 TRER BASSR1 TREL BASSL1 BASSL2 FLOUT 6-C FLC FROUT AGND F
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