Cambridge-840A-int-sm维修电路原理图.pdf

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1、Gallery Court Hankey Place London SE1 4BB UK Tel: +44 (0)20 7940 2200 Fax: +44 (0)20 7940 2233 840A Issue Date: 16th June 2006 _ SERVICE MANUAL _ SPECIFICATIONS: Power Output 120W RMS into 8 Ohms 200W RMS into 4 Ohms THD (unweighted) 0.0015% 1 kHz at 80% of rated power 83dB Input Impedances Input 1

2、(balanced) 10 kOhm Inputs 2-7 68 kOhm Tape Input 68 kOhm Power Amp damping factor 110 at 1kHz Max power consumption 800W Minimum power consumption Active (no signal) 70W Standby 7W Bass furthermore the manufacturer cannot accept responsibility for personal injury or property damage resulting therefr

3、om. 6. When servicing, care should be taken to observe the original routing and dressing of the leads and it should be confirmed that they have been returned to normal after re-assembly. Notes on chip component replacement Never reuse a component that has been removed from a PCB Notice that the minu

4、s side of a tantalum capacitor may be damaged by heat COPYRIGHT NOTICE. 2007 Audio Partnership PLC. All rights reserved. Cambridge Audio and Azur are registered trademarks for Audio Partnership PLC. This document may not be reproduced, distributed, transmitted, displayed, published, or broadcast wit

5、hout the express written prior permission of Audio Partnership PLC. Alteration or removal of any trademark, copyright, or other notice from this content is prohibited. Information provided in this document is provided solely for the use of official service agents in repairing and servicing Audio Par

6、tnership PLC products. 4 Cambridge Audio Azur 840A Amplifier 840A Block Diagram To enhance viewing, please print to A35 7 10 6 2 3 9 17 418 15 8 13 5 11 16 6 1 15 14 12 5 Cambridge Audio Azur 840A Amplifier 840A Exploded Diagram To enhance viewing, please print to A36 Cambridge Audio Azur 840A Ampli

7、fier Exploded Diagram Parts List Drawing Ref: AP Part Number noi tpi rcseD: feRyrotcaF 1PY11182331-004909E301Speaker Binding Post BP331 (Black) Red MAINS FAIL References to “the PIC” or “the main PIC” are to the main housekeeping PIC on the front panel PCB unless otherwise stated. 51 The Power Suppl

8、y PCB This carries: Power supplies for everything except power amps Mains on/off and inrush control switching relays X2 capacitor The mains-fail detect circuit There are four power supply rails: +15V Opamp supply -15VOpamp supply +9VRelay supply +5VMicrocontroller, logic and comparator supply The po

9、wer supply board also carries the mains switching relays that control the supplies to the power amplifiers. When the amplifier goes from standby to ON, the inrush control relay RL4 closes first with R78 limiting the inrush current. After 3 seconds (while speaker-short testing is going on- see below)

10、 the On/Off relay RL3 closes. 100 msec later (to ensure no break in the supply) RL4 opens. When the amplifier goes from ON to standby, RL3 simply opens. The front panel PCB This carries: The main PIC The volume rotary encoder and control switches. The LCD display Shift registers for driving the rela

11、ys The RS232 interface for control and software updates U1 is the main housekeeping microcontroller for the amplifier; it is a 16F977A PIC running at 20 MHz. It handles all the control functions of the amplifier except for those on the A-BUS hub PCB, which are dealt with by another PIC on that board

12、. PIC pins handling amplifier conditions: PinNormalActive Speaker short-circuit detect 7LOWHIGH Active= short found Phones detect 27HIGHLOW Active= Phone jack in Mains fail 28LOW HIGH DC offset protection29HIGHLOW Overtemperature protection30HIGHLOW Overload protection 33HIGHLOW Clip detection 34HIG

13、H LOW The LCD display module interfaces to the front panel PCB through CN2. Display data from the PIC is clocked serially into shift register U2 and sent to the LCD module in byte-wide parallel format. The LCD module is powered from the +5V rail. 52 The relays on the other PCBs are controlled by a s

14、et of shift registers that convert serial data from the PIC into 32 latched outputs. Four shift registers (U3,U4,U5,U6) are connected so that the serial input enters the first register and is clocked through and out of its serial output into the serial input of the second register. Changing any outp

15、ut requires 32 bits to be clocked through the registers by the SERIAL CLOCK signal. When SERIAL STROBE goes high the data is latched in each register to give a static output. Data appears at the outputs only when the SHIFT REG ENABLE line is high. This line is kept low at start-up to prevent random

16、data at the outputs, and only goes high when the PIC has initialised the shift registers. The RS232 interface is used to control the amplifier and can also be used to reprogram the main PIC. The interface consists of Q3 and Q4. Q3 handles incoming RS232 data, providing a level-shift from RS232 level

17、s (nominally +/-9V) to PIC levels (+5V/0V). Q4 handles outgoing RS232 data, level shifting it to give a +15V/0V output. The main PIC is reprogrammed by holding the standby/ON button in when the mains power is turned on. The word DOWNLOAD appears on the LCD. A PC running a Windows program is used to

18、download the program. The Hub PIC can in turn be reprogrammed by the main PIC. This is done by the PGM, MCLR HUB, PROGRAM_DATA, and PROGRAM_CLOCK lines that go to the Hub PCB via CN3. The Input PCB The input PCB carries: Input buffers Input select relays Tape out buffer Input amplifier +6 dB Hub inp

19、ut switcher Relay drivers The input PCB has one stereo input (Input 1) that accepts both balanced and unbalanced signals, and six more unbalanced stereo inputs. There is a further input for tape monitor use. There is a tape output, taken from before the tone and volume controls, and a preamp output

20、taken from after the tone and volume controls. All component numbers here refer to the Left channel. The A-BUS hub also uses the amplifier inputs. The required input is selected separately from the main amplifier input by the CMOS switching IC U1. This is controlled by serial data from the microcont

21、roller on the hub PCB, in response to switch presses or IR commands. The relays are driven from an 8-bit serial-in parallel-out (SIPO) shift register on the front panel PCB. The eight logic signals come in on CN8 and control the 7-way open-collector relay driver U16. The eighth relay is controlled b

22、y Q1. 53 The Preamplifier PCB The preamplifier PCB carries: The tone controls and DIRECT switch Relay balance control Balance control buffer Amplifier Relay volume control Volume control post amplifier Relay drivers ON/standby LED control The IR receiver Headphone socket All component numbers here r

23、efer to the Left channel. The balance control operates in discrete steps selected by relays. There are eight steps on each side of the central position. This is implemented by switching in combinations of three attenuator sections; the first is R97,R22,R105, the second R85,R87 and the third R88,R86,

24、R89. These are switched in or out by relays RL17, RL18 and RL19. When none of these relays are energised the balance network gives the first step of attenuation due to R97. When RL15 is energised the balance attenuator network is inserted into the left channel and the stereo image is shifted to the

25、right. When RL16 is energised the balance attenuator network is inserted into the right channel and the stereo image is shifted to the left. The balance control attenuation steps are: StepNominal dB 00 1-1.3 2-2.5 3-3.4 4-4.5 5-5.5 6-6.8 7-7.7 8-8.8 The volume control is a relay-driven stepped atten

26、uator that gives 1 dB steps from 0 dB to -64 dB. There are 2 dB steps from -64 dB to -76 dB, and two final steps of -84 dB and -infinity. The final step also opens the power amplifier output relays to ensure that “off” is well and truly off, The volume control has an array of 14 resistances connecte

27、d to an output rail. Each resistance is connected to either the input signal rail or ground by its associated relay. (RL1 to RL14) The resistances are typically made up two resistors to obtain the exact desired value. This represents a potential divider that allows very fine control of attenuation.

28、The 1 db steps are accurate to within +/-0.2 dB. The volume network has a constant output impedance of 312 Ohms, independent of volume setting. The volume setting is stored in non-volatile memory when the unit is switched off at the mains. The volume control can be set to ramp up from zero to the st

29、ored setting at power-up, and to ramp down on going to standby; this is an option on the configuration menu. 54 The volume control and balance relays are driven from three 8-bit serial-in parallel-out (SIPO) shift registers on the front panel PCB. The logic signals come in on CN6, CN8 and CN9, and c

30、ontrol the 7- way open-collector relay drivers U4,U5,U7. Driver U7 also controls the mains on/off and inrush relays, (on the PSU PCB) the two amplifier output relays, (on the right amplifier PCB). R111 is a pull-up resistor which allows MAINS ON/OFF RELAY to go high during testing if the PSU board i

31、s not being used to power front-panel and preamp PCBs, and thus permits the LED control to work properly in this condition. Headphone socket The phones Left and Right signals come in from the two amplifier PCBs. When a jack is inserted in to the phones socket, the normally-closed contacts open, and

32、the PHONES DETECT signal goes low, signalling the PIC to open the output relays and disconnect the loudspeakers. Power Amplifier PCBs The power amplifier boards are very similar. The left channel is described in detail, and the right channel description deals only with the differences. Power Amplifi

33、er Left PCB This description is subdivided as follows: Input stage DC trim system. The Voltage Amplifier Stage Biasing system Output stage The XD Crossover Displacement system Power supplies Overload protection Clip detection DC offset protection Over-temperature protection Speaker short-circuit det

34、ection Headphone output attenuator DC trim system. VR2 and its associated components make up the DC trimming network; this allows to output DC offset to be reduced to less than 1mV. The XD Crossover Displacement system. The essence of the Crossover Displacement principle is the injection of an extra

35、 current, varying with the signal, into the output point of a conventional Class-B output stage, with the result that the crossover point is displaced away from the no-signal voltage. The displacement current is made proportional to the output voltage. For example, if the displacement current is 1 A

36、mp with the output at quiescent at 0V, it is set to increase to 2 Amps with the output fully negative, and to reduce to zero with the output fully positive. 55 The XD control circuit is a differential pair of transistors with one input grounded and the other driven by the main amplifier output volta

37、ge, scaled down appropriately by R63, R64. The drive to the displacer is taken from collector load R58, to give the required phase inversion. R59 is present simply to equalise the dissipation in the differential pair transistors to maintain their balance. The tail of the differential pair is fed by

38、constant-current source Q27. Since half of the standing current through the differential pair flows through R58, the value of the tail current-source sets the quiescent displacement current. Q27 is a simple current-source biased by silicon diodes D12, D13. The displacement current itself is handled

39、by the voltage-controlled current source Q18, Q17. The Q18, Q17 structure acts as a unity-gain voltage stage with 100% voltage feedback from Q17 collector to Q18 emitter, and it sets up the voltage across R58 as a voltage across the low-value resistor R31, minus the Vbe drop of Q18. There is provisi

40、on for turning off the XD system under PIC control, to make servicing easier. This is done by Q26. Normally the XD ON/OFF signal coming in on Pin 9 of CN2 is high, (+5V) so Q31 is held off and Q26 is off. When XD is disabled, XD ON/OFF goes low and Q31 is turned on via R83. Q26 is then turned on via

41、 R82. The equivalent to Q26 on theright power amp PCB is also turned on by the connection through Pin 10 of CN1. Power supplies The power supply for the power amplifier consists of three rails. The voltages given here are nominal as they depend on the exact value of the mains supply voltage The +48V

42、 rail supplies all the positive power to the amplifier. The -48V rail powers only the amplifier output stage, including the XD Crossover Displacement system. The -51V rail provides negative power for the small-signal circuitry. This permits greater output as without it the negative-going voltage-swi

43、ng of the voltage-amplifier stage is limited, and negative clipping occurs before positive clipping. Overload protection. The amplifier is protected against short-term overloads by dual slope VI limiting. The upper half of the output stage is protected by Q19 and associated components. When overload

44、 occurs Q19 conducts and shunts current away from the base of Q1, limiting the amplifier output. The current so shunted is limited in magnitude by the current-source Q4. D2 prevents Q19 conducting backwards on negative output excursions. The protection of the lower half of the output stage is very s

45、imilar, Q20 being the VI limiter. However, in this case the current shunted away when Q20 conducts is not inherently limited; this is done by the extra current-limiting circuit Q11, R15, R16. When the voltage across R9 becomes excessive, Q11 turns on and shunts the base drive away from Q9. The ampli

46、fier is protected against long-term overloads by the PIC opening the output relay. Operation of the VI limiter Q20 draws extra current through R9 and turns on Q25 via R49; this happens at a lower current than that at which Q11 limits the VAS current. Q25 collector is wire-ORed with the equivalent tr

47、ansistor on the right-hand amplifier PCB, and the OVERLOAD SIGNAL goes to the preamp PCB via CN2, pin6. 56 Clip detection. When it is enabled, the clip-detect system turns down the volume when excess clipping of either amplifier output occurs. Very brief episodes of clipping are ignored. The volume

48、stays reduced and does not ramp back up in the absence of clipping. The clip detect system is based on Q23, Q24 and associated components. Normally both transistors are on, and the CLIP signal at Q24 collector is high. Since the circuit operates by monitoring how far the output is from the supply ra

49、ils, variations in supply voltage are compensated for. DC offset protection: The output of the Left amplifier is filtered by R35 and C3 to remove audio content. If a DC voltage of either polarity exists Q21,Q22 turn on and the voltage on Q21 collector falls. This point is wire-ORed with the DC offset detector voltage on the right power amplifier PCB via CN1. Detailed operation is a