HarmanKardon-MAS102-cms-sm1维修电路原理图.pdf
Music system Service Manual MAS 101/102/111 CD RadioFans.CN CONTENTS 1. Specification .1 2. Packing .3 3. Front panel information .4 4. Rear panel information 5 5. Remote control information 6 6. Block diagram .8 7. Wiring diagrams .9 8. IC spec .10 9. Printed circuit boards .87 10. Schematic diagram .97 11. Exploded view .108 12. Electrical parts list 110 RadioFans.CN 1 MAS SySteMSpecifications System Power output65 watts per channel, 20hz 20khz, thd <0.07%, into 6 ohms, both channels driven Bandwidth20hz 35khz, 3dB System frequency response20hz 20khz, 0.5dB Signal-to-noise ratio, a-weighted90dB (analog inputs), 96dB (digital inputs) channel separation65dB crosstalk between sources70dB Line-level input sensitivity at 1khz250mV rMS, 1dB Phono MM input sensitivity at 1khz7.5mV Loudspeakers Low-frequency transducerstwo 130mm honeycomb composite drivers, ported high-frequency transducerstwo 25mm MMd domes, shielded nominal impedance8 ohms Sensitivity (2.83V/1m)85dB frequency response60hz 25khz (3dB) crossover frequency2200hz FM Tuner Section frequency range87 108.0Mhz usable sensitivityIhf 1.3V/13.2dBf frequency response10hz to 15.3khz Signal-to-noise ratiomono/stereo 68/65dB distortionmono/stereo 0.15/0.3% Stereo separation35dB 1khz, 100% deviation 65dBf Selectivity300khz; 65dBf Image rejection80dB If rejection90dB tuner output level1khz, 50khz, dev 500mV number of presets30 rdS capabilityPS (program service), rt (dynamic radio text) 0257CSK - HK MAS 101-102-111 OM v6.indd 1808/12/10 9:44:52 RadioFans.CN ENGLISH MAS SySteMSpecifications CD Section disc compatibilitycd, cd-r, cd-rW, MP3, WMa thd+n (20hz 20khz)96dBr; 22khz filter 94dBr General Power requirementac 230V/50hz (MaS 101/MaS 111); ac 120V/60hz (MaS 102) Power consumption<1W full standby (clock not activated); TA. Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. Note 7: Number specified is the slower of positive and negative slew rates. Note 8: The EMI Rejection Ratio is defined as EMIRR = 20log ( VRF_PEAK/VOS). Note 9: The typical value is calculated by applying absolute value transform to the distribution, then taking the statistical average of the resulting distribution. Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production. Note 11: The specified limits represent the lower of the measured values for each output range condition. Connection Diagrams 5-Pin SC-70 30024102 Top View 8-Pin MSOP 30024103 Top View 14-Pin TSSOP 30024104 Top View Ordering Information PackagePart NumberPackage MarkingTransport MediaNSC Drawing 5-Pin SC-70 LMV831MG AFA 1k Units Tape and Reel MAA05ALMV831MGE250 Units Tape and Reel LMV831MGX3k Units Tape and Reel 8-Pin MSOP LMV832MM AU5A 1k Units Tape and Reel MUA08ALMV832MME250 Units Tape and Reel LMV832MMX3.5k Units Tape and Reel 14-Pin TSSOP LMV834MT LMV834MT 94 Units/Rail MTC14 LMV834MTX2.5k Units Tape and Reel LMV831 Single/ LMV832 Dual/ LMV834 Quad 40 Features 1. Features 1. Features Alis M5673 provides cost-effective solutions for playback audio from disc, SD/MMC/MS flash card and USB mass storage device.It built-in audio 24-bit Digital Signal Processor. With state-of-the-art technology and cost-effective integration in mind, M5673 is developed to provide many leading features in a system-on-chip solution, including CD RF PreAmp, CD Servo controller, EDC/ECC error detection and correction, full-speed USB1.1 host controller, SD/MMC/MS memory card interface, high-performance caching micro-controller with user-configurable I/Os, high-performance mixed-mode audio macros, etc. CD Servo CD Servo Integrated RF Amp, Servo control, CD-DSP and CD-ROM decoder. Support CD/CD-R/CD-RW physical format disc. Support CDDA, CD-ROM(mode 1, mode2 form 1)logical format playback. Support up to 4X speed optical pickup unit. Embedded SRAM for ECC buffer, no need extra external DRAM. USB1.1 Controller USB1.1 Controller on-chip USB transceiver compliant with USB Specification revision 1.1 Full-Speed(FS) Support full-speed USB1.1 host mode for USB disc. Built-in Configurable Four USB Endpoint FIF Os. -Endpoint 0: 64-byte FIFO support for Control transfer. -Endpoint A: 64-byte double-buffered bulk-In transfer. -Endpoint B: 64-byte double-buffered bulk-Out transfer. -Endpoint C: 8-byte interrupt transfer. Support USB wakeup/suspend. support DMA operation for bulk transfer. Data Storage Controller Data Storage Controller Support flash cards including Secure-Digital (SD) and Multi-Media Card (MMC), Memory Stick (MS), MS-Pro, etc. Support DMA operation. High performance Micro-controller High performance Micro-controller High-performance 8-bit 56MHz micro-controller with 8051 compatible instruction set. Built-in 8KBytes 2-way i-cache SRAM. Support up to 256 KBytes external Serial-Flash. Maximum 32K-bytes internal program SRAM for system FW upgrade when audio DSP is disabled. Audio DSP Audio DSP High-performance 24-bit digital Signal Processor. Support MPEG1 Layer 1/Layer 2/Layer 3 decode. Support MPEG2/2.5 Layer 3 decode. Support WMA full class decode. Support ADPCM 4 bit mode encode/decode. Integrated Audio Codec Integrated Audio Codec Built-in high-performance stereo A/D and D/A converters. Support Line In/FM in inputs. Microphone input with boost. Built-in Bass filter and PGA gain controller. Integrated Linear Regulator Integrated Linear Regulator Built-in 3.3V to 1.8V regulator for M5673 core power . Programmable 1.8V power ranges: 1.6V1.9V. General feature General feature Programmable GPIOs for Buttons and LED control. Build-in 3 ADC for key detection or other application. .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary 41 Block Diagram 3. Block Diagram 3. Block Diagram .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary 42 Pin Configuration 4. Pin Configuration Table 4-4. Pins Listed in Numeric Order 4. Pin Configuration Table 4-4. Pins Listed in Numeric Order Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal 1 LDO 33 LINEOUTL 65 GPIOD1/ 12CM-DAT 97 GPIOH5/LCDRS 2 TP1 34 BICAPR 66 GPIOD2/ 12S-SCLK 98 GPIOH6/LCDCSJ 3 TP2 35 BOCAPR 67 GPIOD3/ 12S-REFCLK 99 PRSTB 4 MC 36 LINEOUTR 68 GPIOD4/ 12S-D0 100 GPIOH7/LCDRDJ 5 MB 37 AVSS33-AUD 69 GPIOD5/ 12S-D1 101 GPIO10/LCDWRJ 6 MD 38 AVSS33-AUD 70 GPIOD6/ 12S-WCLK 102 GPIOI1/PWMO/ LCD-ALE 7 MA 39 FMINR 71 GPIOD7/SPDIF 103 GPIOI2/IRC 8 AVDD33-2 40 LINEINR 72 GPIOE0 104 GPIOI3/PWM1 9 HAVC 41 MICIN 73 GPIOE1 105 GPIOI4/PWM2 10 V12 42 FMINL 74 GPIOE2 106 GPIOI5 11 AVSS33-2 43 LINEINL 75 GPIOE3 107 GPIOI6 12 TELP 44 MICBIAS 76 GPIOE4/SDD0 108 GPIOI7/ 12CS-CLK 13 MPXOUT1 45 V08L 77 GPIOE5/SDD1 109 GPIOJ0/ 12CS-DAT 14 MPXOUT2 46 V15L 78 GPIOE6/SDD2 110 GPIOJ1 15 MPXOUT3 47 V08R 79 GPIOE7/SDD3 111 GPIOJ2 16 COSP 48 V15R 80 GPIOF0/SDCMD 112 GND-PAD 17 COSN 49 VREF 81 GPIOF1/SD-CLK 113 VDD-PAD 18 AVDD33-3 50 SFGP 82 GPIOF2 114 GND-CORE 19 VTB 51 SFGN 83 GPIOF3 115 VDD-CORE 20 VTP 52 DM 84 GND-PAD 116 AVDD-D33 21 AVSS33-3 53 DP 85 VDD-PAD 117 BTN-ADIN1 22 AVSS33-LDO 54 VDD-CORE 86 GPIOG2 118 BTN-ADIN2 23 AVDD33-LDO 55 GND-CORE 87 GPIOG3 119 BTN-ADIN3 24 AVDD18-LDO 56 GND-PAD 88 GPIOG4 120 VREF16 25 AVDD33-CKG 57 VDD-PAD 89 GPIOG5/LCDDB0121 FMO 26 XTAL1 58 GPIOB6/SFDO 90 GPIOG6/LCDDB1122 AVD33-1 27 XTALO 59 GPIOB7/SFDI 91 GPIOG7/LCDDB2123 DMO 28 AVSS33-CKG 60 GPIOC0/SFCSB 92 GPIOH0/LCDDB3 124 AVSS33-1 29 AVDD18-1 61 GPIOC1/SFSCK 93 GPIOH1/LCDDB4 125 GPWM 30 AVSS18-1 62 GPIOC2/URTX 94 GPIOH2/LCDDB5 126 FOO 31 BICAPL 63 GPIOC3/URRX 95 GPIOH3/LCDDB6 127 TRO 32 BOCAPL 64 GPIOD0/ 12CM-CLK 96 GPIOH4/LCDDB7 128 MDI .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary 43 Pin Description 5. Pin Description 5. Pin Description Table 5-2. Pin Description Pin(s) No. Signal Attribute Description 1 LDO O/A Laser Driver Output of APC 2 TP1 I/A 3 Beam Satellite PD Positive Input 3 TP2 I/A 3 Beam Satellite PD Negative Input 4 MC I/A Input of main Beam Signal (C) 5 MB I/A Input of main Beam Signal (B) 6 MD I/A Input of main Beam Signal (D) 7 MA I/A Input of main Beam Signal (A) 8 AVDD33-2 P Servo Analog Power 9 HAVC O/A Voltage Reference (programmable) 10 V12 O/A Voltage Reference (1.2V) 11 AVSS33-2 G Servo Analong Ground 12 TELP O/A Low Pass Filter Capacitor Connecting for TEZC Detection 13 MPXOUT1 O/A Multiplexer output 1 for Analog Signal Monitoring 14 MPXOUT2 O/A Multiplexer output 2 for Analog Signal Monitoring 15 MPXOUT3 O/A Multiplexer output 3 for Analog Signal Monitoring 16 COSP O/A External Capacitor Connection of offset Cancellation Loop for VGA in EQRF Block (Postive) 17 COSN O/A External Capacitor Connection of offset Cancellation Loop for VGA in EQRF Block (Negative) 18 AVDD33-3 P PRML ADC Power 19 VTB B/O PRML ADC Voltage Control, connect to Capacitor 20 VTP B/O PRML ADC Voltage Control, connect to Capacitor 21 AVSS33-3 G PRML ADC Ground 22 AVSS33-LDO G LDO Ground 23 AVDD33-LDO P LDO 3.3V input 24 AVDD18-LDO O/A LDO 1.8V output 25 AVDD33-CKG P Clock Generator Power 26 XTAL1 I/A External XTAL (I), 16.9344MHz 27 XTALO O/A External XTAL (O), 16.9344MHz 28 AVSS33-CKG G Clock Generator Ground 29 AVDD18-1 P Analog Power for PLL 30 AVSS18-1 G Analog Ground for PLL 31 BICAPL I/A Left channel Bass capacitor in 32 BOCAPL O/A Left channel Bass capacitor out 33 LINEOUTL O/A Left Channel Audio out 34 BICAPR I/A Right channel Bass capacitor in 35 BOCAPR O/A Right channel Bass capacitor out 36 LINEOUTR O/A Right channel Audio out 37 AVSS33-AUD G VSS of ADC/DAC 38 AVDD33-AUD P VDD of ADC/DAC 39 FMINR I/A Right channel ADC FM in 40 LINEINR I/A Right channel ADC line in 41 MICIN I/A ADC MIC in 42 FMINL I/A Left channel ADC FM in 43 LINEINL I/A Left channel ADC line in 44 MICBIAS I/A MIC DC bias 45 V08L O/A Left channel VCM reference 46 V15L O/A Left channel voltage reference 47 V08R O/A Right channel VCM reference 48 V15R O/A Right channel voltage reference 49 VREF O/A Internal resistor string provide Vref 50 SFGP I/A DISC stop pos input/GPIO 51 SFGN I/A DISC stop neg input/GPIO 52 DM USB D- 53 DP USB D+ 54 VDD-CORE P Digital Core power 55 GND-CORE G Digital Core Ground 56 GND-PAD G Digital PAD Ground .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary 44 M5673 Pin(s) No. Signal Attribute Description 57 VDD-PAD P Digital PAD power 58 GPIOB6/SFDO B / D GPIOB6/Seriel flash data input 59 GPIOB7/SFDI B / D GPIOB7/Seriel flash data output 60 GPIOC0/SFCSB B / D GPIOC0/Seriel flash csj 61 GPIOC1/SFSCK B / D GPIOC1/Seriel flash clk 62 GPIOC2/URTX B / D GPIOC2/RS-232 TX 63 GPIOC3/URRX B / D GPIOC3/RS-232 RX 64 GPIOD0/12CM-CLK B / D GPIOD0/12C clk output (M5673 is master) 65 GPIOD1/12CM-DAT B / D GPIOD1/12C data (M5673 is master) 66 GPIOD2/12S-SCLK B / D GPIOD2/12S bit clk output 67 GPIOD3/12S-REFCLK B / D GPIOD3/12S system(reference) clk output 68 GPIOD4/12S-D0 B / D GPIOD4/12S data output 69 GPIOD5/12S-D1 B / D GPIOD5/12S data input 70 GPIOD6/12S-WCLK B / D GPIOD6/12S word clk(LRCK) output 71 GPIOD7/SPDIF B / D GPIOD7/SPDIF output 72 GPIOE0 B / D GPIOE0 73 GPIOE1 B / D GPIOE1 74 GPIOE2 B / D GPIOE2 75 GPIOE3 B / D GPIOE3 76 GPIOE4/SDD0 B / D GPIOE4/SD Card data0 77 GPIOE5/SDD1 B / D GPIOE5/SD Card data1 78 GPIOE6/SDD2 B / D GPIOE6/SD Card data2 79 GPIOE7/SDD3 B / D GPIOE7/SD Card data3 80 GPIOF0/SDCMD B / D GPIOE0/SD Card command 81 GPIOF1/SD-CLK B / D GPIOE1/SD Card clk 82 GPIOF2 B / D GPIOF2 83 GPIOF3 B / D GPIOF3 84 GND-PAD G Digital PAD Ground 85 VDD-PAD P Digital PAD power 86 GPIOG2 B / D GPIOG2 87 GPIOG3 B / D GPIOG3 88 GPIOG4 B / D GPIOG4 89 GPIOG5/LCDDB0 B / D GPIOG5/LCD data0 90 GPIOG6/LCDDB1 B / D GPIOG6/LCD data1 91 GPIOG7/LCDDB2 B / D GPIOG7/LCD data2 92 GPIOH0/LCDDB3 B / D GPIOH0/LCD data3 93 GPIOH1/LCDDB4 B / D GPIOH1/LCD data4 94 GPIOH2/LCDDB5 B / D GPIOH2/LCD data5 95 GPIOH3/LCDDB6 B / D GPIOH3/LCD data6 96 GPIOH4/LCDDB7 B / D GPIOH4/LCD data7 97 GPIOH5/LCDRS B / D GPIOH5/LCD status/command 98 GPIOH6/LCDCSJ B / D GPIOH6/LCD CSJ 99 PRSTB B / D Chip reset, low active 100 GPIOH7/LCDRDJ B / D GPIOH7/LCD read control signal 101 GPIO10/LCDWRJ B / D GPIOI0/LCD write control signal 102 GPIOI1/PWMO/LCD-ALE B / D GPIOI1/PWMO output /LCD ALE signal when address /data share bus 103 GPIOI2/IRC B / D GPIOI2/remote controller received 104 GPIOI3/PWM1 B / D GPIOI3/PWM1 output 105 GPIOI4/PWM2 B / D GPIOI4/PWM2 output 106 GPIOI5 B / D GPIOI5 107 GPIOI6 B / D GPIOI6 108 GPIOI7/12CS-CLK B / D GPIOI7/12C clk when M5673 is slave 109 GPIOJ0/12CS-DAT B / D GPIOJ0/12C data when M5673 slave 110 GPIOJ1 B / D GPIOJ1 111 GPIOJ2 B / D GPIOJ2 112 GND-PAD G Digital PAD Ground 113 VDD-PAD P Digital PAD power 114 GND-CORE G Digital Core ground 115 VDD-CORE P Digital Core power 116 AVDD-D33 P 3.3V for digital circuit in a analog. .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary .tw M5673 Data Sheet V1.0 specifications subject to change without notice Preliminary Confidential Proprietary 45 Pin Description Pin(s) No. Signal Attribute Description 117 BTN-ADIN1 I/A Bottom check input, connect to servo ADC 118 BTN-ADIN2 I/A Bottom check input, connect to servo ADC 119 BTN-ADIN3 I/A Bottom check input, connect to servo ADC 120 VREF16 O/A SERVO DAC common
