HarmanKardon-AVR347.230-avr-sb维修电路图 手册.pdf

harman/kardon Service Manual AVR 347/230 AVR 350/230 7 x 55W 7.1 CHANNEL A/V RECEIVERS CONTENTS THIS MANUAL CONTAINS SEMICONDUCTOR PINOUTS ONLY. Main Service Manual in separate file Released EU2008 harman/kardon, Inc. Rev 0, 07/2008 250 Crossways Park Dr. Woodbury, New York, 11797 harman/kardonAVR 347/230, AVR 350/230 Semiconductor Pinouts Page 1 of 51 RadioFans.CN 54 hFERank O(5000to12000), P(6500to20000), Y(15000to30000) Darlington2SB1647 IC V CE Characteristics (Typical) hFE I C Characteristics (Typical)hFE I C Temperature Characteristics (Typical) IC V BE Temperature Characteristics (Typical)VCE(sat)IB Characteristics (Typical) PcTa Derating 10mA 50mA 3mA 0 3 2 1 0.210.510520010050 Base Current IB(mA) Collector-Emitter Saturation Voltage VCE(sat)(V) IC=10A IC=15A IC=5A 0 15 10 5 0321 Base-Emittor Voltage VBE(V) Collector Current IC(A) (VCE=4V) 125C (Case Temp) 25C (Case Temp) 30C (Case Temp) 0.20.51510 15 Collector Current IC(A) DC Current Gain hFE (VCE=4V) 1,000 10,000 50,000 5,000 Typ (VCE=4V) 0.210.5510 15 1000 5000 10000 50000 Collector Current IC(A) DC Current Gain hFE 25C 30C 125C Time t(ms) 0.1 1 3 0.5 11010010002000 Transient Thermal Resistance j-a(C/W) 0.020.10.050.51510 0 40 20 60 Cut-off Frequency fT(MHZ) (VCE=12V) Emitter Current IE(A) Safe Operating Area (Single Pulse) j-a t Characteristics fT I E Characteristics (Typical) 0 0 5 10 15 264 Collector-Emitter Voltage VCE(V) Collector Current IC(A) 1.5mA 1.0mA 0.8mA IB=0.3mA 0.5mA 2mA 130 100 50 3.5 0 Ambient Temperature Ta(C) Maximum Power Dissipation PC(W) With Infinite heatsink Without Heatsink 0255075100125150 Silicon PNP Epitaxial Planar Transistor (Complement to type 2SD2560) Application : Audio, Series Regulator and General Purpose Symbol VCBO VCEO VEBO IC IB PC Tj Tstg 2SB1647 150 150 5 15 1 130(Tc=25C) 150 55 to +150 Unit V V V A A W C C IAbsolute maximum ratings IElectrical Characteristics Symbol ICBO IEBO V(BR)CEO hFE VCE(sat) VBE(sat) fT COB 2SB1647 100max 100max 150min 5000min 2.5max 3.0max 45typ 320typ Unit A A V V V MHz pF Conditions VCB=150V VEB=5V IC=30mA VCE=4V, IC=10A IC=10A, IB=10mA IC=10A, IB=10mA VCE=12V, IE=2A VCB=10V, f=1MHz (Ta=25C)(Ta=25C) External Dimensions MT-100(TO3P) 15.60.4 9.6 19.90.3 4.02.0 5.00.2 1.8 3.20.1 2 3 1.05+0.2-0.1 20.0min 4.0max BE 5.450.15.450.1 C 4.80.2 0.65+0.2-0.1 1.4 2.00.1 a b ITypical Switching Characteristics (Common Emitter) VCC (V) 40 RL () 4 IC (A) 10 VBB2 (V) 5 IB2 (mA) 10 ton (s) 0.7typ tstg (s) 1.6typ tf (s) 1.1typ IB1 (mA) 10 VBB1 (V) 10 Weight : Approx 6.0g a. Type No. b. Lot No. B E C (70) Equivalent circuit harman/kardonAVR 347/230, AVR 350/230 Semiconductor Pinouts Page 2 of 51 RadioFans.CN 158 Silicon NPN Triple Diffused Planar Transistor (Complement to type 2SB1647) Application : Audio, Series Regulator and General Purpose Symbol VCBO VCEO VEBO IC IB PC Tj Tstg 2SD2560 150 150 5 15 1 130(Tc=25C) 150 55to+150 Unit V V V A A W C C IAbsolute maximum ratings IElectrical Characteristics Symbol ICBO IEBO V(BR)CEO hFE VCE(sat) VBE(sat) fT COB 2SD2560 100max 100max 150min 5000min 2.5max 3.0max 70typ 120typ Unit A A V V V MHz pF Conditions VCB=150V VEB=5V IC=30mA VCE=4V, IC=10A IC=10A, IB=10mA IC=10A, IB=10mA VCE=12V, IE=2A VCB=10V, f=1MHz Darlington2SD2560 (Ta=25C)(Ta=25C) IC V CE Characteristics (Typical) Safe Operating Area (Single Pulse) 0 0 10 5 15 246 Collector-Emitter Voltage VCE(V) Collector Current IC(A) 50mA IB=0.3mA 0.5mA 0.8mA 2mA 1.0mA 3mA 10mA 1.5mA VCE(sat)IB Characteristics (Typical) 0 3 2 1 0.210.510520010050 Base Current IB(mA) Collector-Emitter Saturation Voltage VCE(sat)(V) IC=.15A IC=.10A IC=.5A IC V BE Temperature Characteristics (Typical) 0 15 5 10 022.21 Base-Emittor Voltage VBE(V) Collector Current IC(A) (VCE=4V) 125C (Case Temp) 25C (Case Temp) 30C (Case Temp) hFE I C Characteristics (Typical) Collector Current IC(A) 020.5110155 50000 1000 5000 10000 500 DC Current Gain hFE (VCE=4V) Typ 020.5110155 50000 1000 5000 10000 500 DC Current Gain hFE (VCE=4V) hFE I C Temperature Characteristics (Typical) Collector Current IC(A) 125C 30C 25C j-a t Characteristics 0.1 1.0 3.0 0.5 1101001000 2000 Time t(ms) Transient Thermal Resistance j-a(C/W) fT I E Characteristics (Typical) (VCE=12V) Emitter Current IE(A) 0.050.02010.51510 0 40 20 60 80 Cut-off Frequency fT(MHZ) PcTa Derating 130 100 50 3.5 0 Ambient Temperature Ta(C) Maximum Power Dissipation PC(W) With Infinite heatsink Without Heatsink 0255075100125150 External Dimensions MT-100(TO3P) 15.60.4 9.6 19.90.3 4.02.0 5.00.2 1.8 3.20.1 2 3 1.05+0.2-0.1 20.0min 4.0max BE 5.450.15.450.1 C 4.80.2 0.65+0.2-0.1 1.4 2.00.1 a b Weight : Approx 6.0g a. Type No. b. Lot No. ITypical Switching Characteristics (Common Emitter) VCC (V) 40 RL () 4 IC (A) 10 VBB2 (V) 5 IB2 (mA) 10 ton (s) 0.8typ tstg (s) 4.0typ tf (s) 1.2typ IB1 (mA) 10 VBB1 (V) 10 B C E (70) Equivalent circuit hFE RankO(5000to12000), P(6500to20000), Y(15000to30000) harman/kardonAVR 347/230, AVR 350/230 Semiconductor Pinouts Page 3 of 51 RadioFans.CN 1/8July 2001 IHIGH SPEED: tPD = 5.0ns (TYP.) at VCC = 5V ILOW POWER DISSIPATION: ICC = 2A(MAX.) at TA=25C ICOMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), VIL = 0.8V (MAX.) I50 TRANSMISSION LINE DRIVING CAPABILITY ISYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) IBALANCED PROPAGATION DELAYS: tPLH tPHL IOPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 04 IIMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74ACT04 is an advanced high-speed CMOS HEX INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74ACT04 HEX INVERTER PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGETUBET MM 200V DESCRIPTION The 74LCX32 is a low voltage CMOS QUAD 2-INPUT OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LCX32 LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE WITH 5V TOLERANT INPUTS Figure 1: Pin Connection And IEC Logic Symbols Table 1: Order Codes PACKAGET MM 200V DESCRIPTION The 74LCX74 is a low voltage CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR NON INVERTING fabricated withsub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. A signal on the D INPUT is transferred to the Q OUTPUT duringthe positive going transitionof the clock pulse. CLR and PR are independent of the clock and accomplished by a low setting on the appropriate input. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. Allinputsandoutputsareequippedwith protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LCX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGETUBET in HD Only Mode and Simultaneous HD/SD Mode: Y/Green HD Analog Output. DAC E O In SD Only Mode: Luma/Blue/U Analog Output; in HD Only Mode and Simultaneous HD/SD Mode: Pr/Red Analog Output. DAC F O In SD Only Mode: Chroma/Red/V Analog Output; in HD Only Mode and Simultaneous HD/SD Mode: Pb/Blue HD Analog Output. P_HSYNC I Video Horizontal Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode. P_VSYNC I Video Vertical Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode. P_BLANK I Video Blanking Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode. S_BLANK I/O Video Blanking Control Signal for SD Only. S_HSYNC I/O Video Horizontal Sync Control Signal for SD Only. S_VSYNC I/O Video Vertical Sync Control Signal for SD Only. Y7 to Y0 I SD or Progressive Scan/HDTV Input Port for Y Data. Input port for interleaved progressive scan data. The LSB is set up on Pin Y0. C7 to C0 I Progressive Scan/HDTV Input Port 4:4:4 Input Mode. This port is used for the Cb Blue/U data. The LSB is set up on Pin C0. S7 to S0 I SD or Progressive Scan/HDTV Input Port for Cr Red/V data in 4:4:4 input mode. LSB is set up on Pin S0. RESET I This input resets the on-chip timing generator and sets the ADV7322 into default register setting. RESET is an active low signal. RSET1, RSET2 I A 3040 resistor must be connected from this pin to AGND and is used to control the amplitudes of the DAC outputs. SCLK I I2C Port Serial Interface Clock Input. SDA I/O I2C Port Serial Data Input/Output. ALSB I TTL Address Input. This signal sets up the LSB of the I2C address. When this pin is tied low, the I2C filter is activated, which reduces noise on the I2C interface. VDD_IO P Power Supply for Digital Inputs and Outputs. VDD P Digital Power Supply. VAA P Analog Power Supply. VREF I/O Optional External Voltage Reference Input for DACs or Voltage Reference Output (1.235 V). EXT_LF I External Loop Filter for the Internal PLL. RTC_SCR_TR I Multifunctional Input. Real time control (RTC) input, timing reset input, subcarrier reset input. I2C I This input pin must be tied high (VDD_IO) for the ADV7322 to interface over the I2C port. GND_IO Digital Input/Output Ground. TEST0 to TEST5 I Not used. Tie to DGND harman/kardonAVR 347/230, AVR 350/230 Semiconductor Pinouts Page 10 of 51 RadioFans.CN 1 Features Low-voltage and Standard-voltage Operation 2.7 (VCC = 2.7V to 5.5V) 1.8 (VCC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle (5 ms max) High-reliability Endurance: 1 Million Write Cycles Data Retention: 100 Years Automotive Grade and Lead-free/Halogen-free Devices Available 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23, 8-lead TSSOP and 8-ball dBGA2 Packages Die Sales: Wafer Form, Waffle Pack and Bumped Wafers Description The AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24C01A/02/04/08A/16A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23 (AT24C01A/AT24C02/AT24C04), 8- lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial inter- face. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions. Table 1. Pin Configuration Pin NameFunction A0 - A2Address Inputs SDASerial Data SCLSerial Clock Input WPWrite Protect NCNo Connect GNDGround VCCPower Supply Two-wire Serial EEPROM 1K (128 x 8) 2K (256 x 8) 4K (512 x 8) 8K (1024 x 8) 16K (2048 x 8) AT24C01A AT24C02 AT24C04 AT24C08A AT24C16A 0180VSEEPR8/05 8-lead SOIC 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA 8-lead PDIP 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA 8-lead MAP Bottom View 1 2 3 4 8 7 6 5 VCC WP SCL SDA A0 A1 A2 GND 5-lead SOT23 1 2 3 5 4 SCL GND SDA WP VCC 8-ball dBGA2 Bottom View VCC WP SCL SDA A0 A1 A2 GND 1 2 3 4 8 7 6 5 8-lead TSSOP 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA harman/kardonAVR 347/230, AVR 350/230 Semiconductor Pinouts Page 11 of 51 RadioFans.CN CS42528 2. PIN DESCRIPTIONS Pin Name#Pin Description CX_SDIN1 CX_SDIN2 CX_SDIN3 CX_SDIN4 1 64 63 62 Codec Serial Audio Data Input (Input) - Input for twos complement serial audio data. CX_SCLK2CODEC Serial Clock (Input/Output) - Serial clock for the CODEC serial audio interface. CX_LRCK3CODEC Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the CODEC serial audio data line. VD4 51 Digital Power (Input) - Positive power supply for the digital section. DGND5 52 Digital Ground (Input) - Ground reference. Should be connected to digital ground. VLC6Control Port Power (Input) - Determines the required signal level for the control port. SCL/CCLK7Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external pull-up resistor to the logic interface voltage in I2C mode as shown in the Typical Connection Diagram. SDA/CDOUT8Serial Control Data (Input/Output) - SDA is a data I/O line in I2C mode and requires an external pull-up resistor to the logic interface voltage, as shown in the Typical Connection Diagram. CDOUT is the output data line for the control port interface in SPI mode. AD1/CDIN9Address Bit 1 (I2C)/Serial Control Data (SPI) (Input) - AD1 is a chip address pin in I2C mode; CDIN is the input data line for the control port interface in SPI mode. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1718 1920 212223242526272829303132 64636261 605958575655545352515049 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 CX_SDIN1 SAI_SCLK SAI_LRCK VD DGND VLC SCL/CCLK SDA/CDOUT AD1/CDIN AD0/CS INT RST AINR- AINR+ AINL+ AINL- VQ FILT+ REFGND AOUTB4- AOUTB4+ AOUTA4+ AOUTA4- VA AGND AOUTB3- AOUTB3+ AOUTA3+ AOUTA3- AOUTB2- AOUTB2+ AOUTA2+ AOUTA2- AOUTB1- AOUTB1+ AOUTA1+ AOUTA1- MUTEC AGND VARX RXP7/GPO7 RXP6/GPO6 RXP5/GPO5 RXP4/GPO4 RXP3/GPO3 RXP2/GPO2 RXP1/GPO1 LPFLT RXP0 TXP VD DGND VLS SAI_SDOUT RMCK CX_SDOUT ADCIN2 ADCIN1 OMCK CX_LRCK CX_SCLK CX_SDIN4 CX_SDIN3 CX_SDIN2 CS42528 harman/kardonAVR 347/230, AVR 350/230 Semiconductor Pinouts Page 12 of 51 RadioFans.CN CS42528 10 Address Bit 0 (I2C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I2C mode; CS is the chip select signal in SPI mode. INT11Interrupt (Output) - The CS42528 will generate an interrupt condition as per the Interrupt Mask register. See “Interrupts” on page 40 for more details. RST12Reset (Input) - The device enters a low power mode and all internal registers are reset to their default settings when low. AINR- AINR+ 13 14 Differential Right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma mo