Denon-AVCA11SR-avr-sm维修电路图 手册.pdf
Hi-Fi Component SERVICE MANUAL MODELAVR-4802 MODELAVC-A11SR AV SURROUND RECEIVER / AMPLIFIER ? Some illustrations using in this service manual are slightly different from the actual set. For U.S.A., Canada, Europe, Asia, China, Hong Kong, Korea Edge detection is “Ed”; Detection by both shifting is “E Serial data detection is “S” (Serial data output is also “S”). Res: State at reset. “H”= Outputs High Level at reset “L”= Outputs Low Level at reset “Z”= Becomes High impedance mode at reset Ini: Initial output state. Function: Function and logical level explanation of signals to be interface. 15 AVR-4802/AVC-A11SR 3_TMP95FY64F.p6501/08/02, 20:58Page 2-3Adobe PageMaker 6.5J/Win RadioFans.CN TMP95FY64F (IC802) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? TMP95FY64F Terminal Function Pin. No. NameSymbolI/O Type DetOpResIniFunction 1VREFLVREFLA/D ref. GND 2AVssAVssA/D GND 3AVccAVccAD +5V 4DAOUT0DAOUT0ONo connection 5DAOUT1DAOUT1ONo connection 6_NMI_NMIINot used (fixed to H) 7P53/_BUSRQACKOCZMAIN-SUB com comm. control terminal 8P54/_BUSAKREQILvEuZMAIN-SUB com comm. control terminal 9P55/_WAITPLFL DATAOCZLPLL Edge detection is “Ed”; Detection by both shifting is “E Serial data detection is “S” (Serial data output is also “S”). Res: State at reset. “H”= Outputs High Level at reset “L”= Outputs Low Level at reset “Z”= Becomes High impedance mode at reset Ini: Initial output state. Function: Function and logical level explanation of signals to be interface. 16 AVR-4802/AVC-A11SR 3_TMP95FY64F.p6501/08/02, 20:58Page 4-5Adobe PageMaker 6.5J/Win RadioFans.CN 17 AVR-4802/AVC-A11SR LC89055W-RA8 (IC111) Pin NameFunction LC89055W-RA8 Terminal Function Pin No. 1DISELIData input terminal (select input pin of DIN0, DIN1) 2DOUTOInput bi-phase data through output terminal 3DIN0IAmp built-in coaxial/optical input correspond data input terminal 4DIN1IAmp built-in coaxial/optical input correspond data input terminal 5DIN2IOptical input correspond data input terminal 6DGNDDigital GND 7DVDDDigital power supply 8RIVCO gain control input terminal 9VINIVCO free-run frequency setting input terminal 10LPFOPLL loop filter setting terminal 11AVDDAnalog power supply 12AGNDAnalog GND 13CKOUTOClock output terminal (256fs, 384fs, 512fs, Xtal osc., VCO free-run osc.) 14BCKO64fs clock output terminal 15LRCKOfs clock output terminal (L: Rch, H: Lch, I2S: Reverse) 16DATAOOData output terminal 17XSTATEOInput data detecting result output terminal 18DGNDDigital GND 19DVDDDigital power supply 20XMCKOXtal osc. clock output terminal (24.576MHz or 12.288MHz) 21XOUTOXtal osc. connection output terminal 22XINIXtal osc. connection output terminal 23EMPHAOEmphasis information output terminal of channel status 24AUDIOOBit1 output terminal of channel status 25CSFLAGOTop 40bit revise flag output terminal of channel status 26F0/P0/C0OInput fs cal. sig. out / data type out / input word inf. output terminal 27F1/P1/C1OInput fs cal. sig. out / data type out / input word inf. output terminal 28F2/P2/C2OInput fs cal. sig. out / data type out / input word inf. output terminal 29VF/P3/C3OValidity flag out / data type out / input word inf. output terminal 30DVDDDigital power supply 31DGNDDigital GND 32AUTOONon PCM burst data transfer detect sig. output terminal 33BPSYNCONon PCM burst data preamble Pa, Pb, Pc, Pd sync sig. output terminal 34ERROROPLL lock error, data error flag output terminal 35DOOCPU I/F read data output terminal 36DIICPU I/F write data input terminal 37CEICPU I/F chip enable input terminal 38CLICPU I/F clock input terminal 39XSELIFrequency select input pin of XIN Xtal osc. (24.576MHz or 12.288MHz) 40MODE0IMode setting input terminal 41MODE1IMode setting input terminal 42DGNDDigital GND 43DVDDDigital power supply 44DOSEL0IData output format select input terminal 45DOSEL1IData output format select input terminal 46CKSEL0IOutput clock select input terminal 47CKSEL1IOutput clock select input terminal 48XMODEIReset input terminal I/O * For latch-up countermeasure, set digital (DVDD) and analog (AVDD) power on/off in the same timing. RadioFans.CN 18 AVR-4802/AVC-A11SR 1 2 3 4 5 6 7 8 16 15 14 13 9 1011 12 20 19 18 17 VDD1 VERT* HOR* OSCIN OSCOUT P3 P2 P1 P0 Vss OSC1 OSC2 CS SCK SIN AC VDD2 CVIDEO LECHA CVIN 3 4 5 20 6 11 7 121918 17 16 8 9 10 12 13 14 15 CS SCK SIN VDD1 AC VSS VDD2 OSCI OSC2VERT* HOR* INPUT CONTROL CIRCUIT DATA CONTROL CIRCUIT ADDRESS CONTROL CIRCUIT INDICATION OSCILLATOR TIMING GENERATOR INDICATION CONTROL REGISTER INDICATION RAM INDICATION CHARACTER ROM BLINKING CIRCUIT SYNC SIGNAL SWITCHING CIRCUIT H COUNTER INDICATION LOCATION DETECTION CIRCUIT READ OUT ADDRESS CONTROL CIRCUIT INDICATION CONTROL CIRCUIT SHIFT REGISTER SYNC SIGNAL DIS- CRIMINATING CIRCUIT OSC CIRCUIT FOR SYNC SIGNAL GENERATION TIMING GENERATOR NTSC VIDEO OUTPUT CIRCUIT OSCIN OSCOUT CVIDEO LECHA CVIN P0 P1 P2 P3 M35015-210SP (IC416) M35015-210SP Terminal Function Pin No.SymbolNameI/OFunction 1OSC1Osc. circuit ext.IExternal terminal for indication oscillator circuit. Standard OSC. freq. is approx. 7MHz. 2OSC2terminal.OWith this OSC. freq., decides horizontal indicatin and character width. 3CSChip select inputI Chip select terminal and turns to “L” when transfer serial data. Hysteresis input. Pull up resistor is built-in. 4SCKSerial clock inputI Takes in serial data of SIN at SCK rise when CS terminal is in “L”. Hysteresis input. Pull up rersist is built-in. 5SINSerial data inputI Serial input of register for indication control and data, and address for indication data memory. Hysteresis input. Pull up rersistor is built-in. 6ACAuto-clear inputI Resets internal circuit of IC at “L” mode. Hysteresi input. Pull up resistor is built-in. 7VDD2Power supplyPower supply terminal of analog system. Connect to +5V. 8CVIDEO Combined video output O Output terminal of combined video signal. Outputs 2Vp-p combined signal. Character output, etc. Overlap CVIN signal and outputs at superimpose. 9LECHA Character level input I Input terminal deciding character output level in combined video signal. color of character is white. 10CVIN Combined video input I Input terminal of external combined video signal. Character output etc. overlap this external combined video signal. 11VssGroundGround terminal. Connect to GND. 12P0Output port p0O General output or character background signal BL NK1* output is switchable. Polarity can be selected at ROM mask. 13P1Output port P1O General output or character background signal CO1* output is switchable. Polarity can be selected at ROM mask. 14P2Output port P2O General output or character background signal BLNK2* output is switchable. Polarity can be selected at ROM mask. 15P3Output port P3O General output or character background signal CO2* output is switchable. Polarity can be selected at ROM mask. 16OSCOUTOTerminal for external use of sync signal OSC. circuit. Use the freq.: 14.32MHz at NTSC 17OSCINIsystem, 17.73MHz at PAL. system, 14.30MHz at MPAL system. 18HOR* Horizontal sync signal I Inputs horizontal sync signal. Hysteresis input. 19VERT* Vertical sync signal IInput vertical sync signal. Hysteresis input. Polarity can be selected at ROM mask. 20VDD1Power supplyPower supply terminal of digital system. Connect to +5V. Ext. terminal for sync sig. OSC. Circuit RadioFans.CN 19 AVR-4802/AVC-A11SR LC75721E (IC102) AD1854 (IC301, 303, 305, 307) 64 49 4833 32 17 161 AM 1 AM 2 AM 3 AM 4 AM 5 AM 6 AM 7 AM 8 AM 9 AM 10 AM 11 AM 12 AM 13 AM 14 AM 15 AM 16 AM 17 AM 18 AM 19 AM 20 AM 21 AM 22 AM 23 AM 24 AM 25 AM 26 AM 27 AM 28 AM 29 AM 30 AM 31 AM 32 G7 G8 G9 G10 G11 AA8/G12 AA7/G13 AA6/G14 AA5/G15 AA4/G16 AA3 AA2 AA1 AM35 AM34 AM33 DI CL CE RES VDD OSCI OSCO Vss TEST VFL G1 G2 G3 G4 G5 G6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DGND MCLK CLATCH CCLK CDATA 384/256 X2MCLK ZEROR DEEMP 96/48 AGND OUTR+ OUTR ? FILTR DVDD SDATA BCLK L/RCLK PD/RST MUTE ZEROL IDPM0 IDPM1 FILTB AVDD OUTL+ OUTL ? AGND NameFunction Terminal Function No. 1DGNDIDigital Ground 2MCLKIMaster Clock Input 3CLATCHILatch input for control data 4CCLKIControl clock input for control data 5CDATAISerial control input 6384/256ISelects the master clock mode 7X2MCLKISelects internal clock doubler (LO) or internal clock=MCLK (HI) 8ZERORORight Channel Zero Flag Output 9DEEMPIDe-Emphasis 1096/48ISelects 48kHz (LO) or 96kHz Sample Frequency Control 11,15 AGNDIAnalog Ground 12OUTR+ORight Channel Positive line level analog output 13OUTR-ORight Channel Negative line level analog output 14FILTROVoltage Reference Filter Capacitor Connection 16OUTL-OLeft Channel Negative line level analog output 17OUTL+OLeft Channel Positive line level analog output 18AVDDIAnalog Power supply 19FILTBOFilter Capacitor connection 20IDPM1IInput serial data port mode control one 21IDPM0IInput serial data port mode control zero 22ZEROLOLeft Channel Zero Flag output 23MUTEIMute. Assert HI to mute both stereo analog output 24PD/RSTIPower-Down/Reset 25L/R CLKILeft/Right clock input for input data 26BCLKIBit clock input for input data 27SDATAISerial input 28DVDDIDigital Power Supply I/O Terminal Function SymbolFunction VDDPower terminal +5V VssPower terminal GND VFLPower terminal FL drive Serial data transfer terminal DIDI: Data CLCL: Clock CECE: Chip enable OSCI External CR connecting terminal OSCO RESSystem reset terminal AM1 AM35 Anode output terminal AA1 AA3 AA4/G16 Anode/Grid output terminal AA5/G15 AA6/G14 AA7/G13 AA8/G12 G1 G11Grid output terminal TESTLSI test terminal RadioFans.CN 20 AVR-4802/AVC-A11SR NJM2229S (IC417) 1 16 Sync Sepa Sync Det Phase Det Vsync Sepa 32fH VCO 1/32 157910 5 16 12341211 ? 13 14 6 TC9184AP (IC401, 403) 2 3 4 5 6 11678910 15 14 13 12 11 BASS+ BASS COM TREBLE TREBLE+ Vss VDD GND CK DATA STB BASS+ BASS COM TREBLE TREBLE+ Ladder resister Analog switch 13 bit latch circuit Level shift 20 bit Shift register circuit Analog switch Ladder resister Ladder resister Analog switch 13 bit latch circuit Code detect circuit Analog switch Ladder resister TC9274N-017 (IC113) ? ? ? ? ? BU2090F (IC103) 1Vss 2DATA 3CLOCK 4LCK 5Q0 6Q1 7Q2 8Q3 9Q4 18 17 16 15 14 13 12 11 10 VDD OE Q11 Q10 Q9 Q8 Q7 Q6 Q5 CONTROL CIRCUIT 12-bit SHIFT RESISTER 12-bit STRAGE RESISTER ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MC74HC4053N (IC415) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ! ? ? ? ? ? # # ? $ ? $ $ ? % ? ? PQ15RW11 (IC202) 4 3 2 1 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 2345678910 11 12 13 14 15 16 17 18 19 20 21 22 23 242526272829303132333435363738394041 42 ? ? ? ? & & & ? & ? & ? & ? & ? & ? & ? & ? & ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? ? ? % ? ? ? ? & ? ? & ? & ? & ? & ? & ? & ? & ? & ? & ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? 18 bit Latch Circuit (Rch) (Lch) Same as Rch ( ! ) ! ? & * +, - ? ? . ? ? & * +, - ? ? ! / +0 - ! 1 ? % +1 # 2 +- ( 3 ( ? ? 9 L-ch7 to 91decoder R-ch latch circuit R-ch7 to 91decoder 10 19 ? % 22 ? % 3 2 4 5 6 7 8 11 12 13 14 28 27 26 25 24 23 21 20 18 17 16 15 1 ? % ( 3 ? ? ? ? % ( 3 ? ? ( 3 ( ? ? ( 3 ? 3 ? ? ? % % & ? ? % ? ? % VSSVDD ? % ? 3 ? ? ? ? 3 ( ? ? ? 3 ( ? ? ? 3 ? 3 ? ? ? % % & ? ? % & ? ? ? ? ? ? ? ? 3 ? ? 50k/ 91STEP VR Same as L-ch L-ch latch circuit Shift register (24Bit) Level shift circuit TC9459N (IC119, 302, 304, 306, 308) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0 0 ? ? & & . ? ? & & % ? 4 ? ? ? ? ( ? ? ? ? ? ( ? . % ? ? ? ? ? & & . ? ? & & % ? 4 ? ? ? ? ( ? ? ? ? ? ( ? . & ? ? ? ? ? ? 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 $ ? 5 ? ? ? 6 ? 7- ? % ? 1 ! Truth Table Control Inputs Select Enable C B A ? ? ? & 8 +- # * ! 0 L L L L Z0 Y0 X0 L L L H Z0 Y0 X1 L L H L Z0 Y1 X0 L L H H Z0 Y1 X1 L H L L Z1 Y0 X0 L H L H Z1 Y0 X1 L H H L Z1 Y1 X0 L H H H Z1 Y1 X1 H X X X None TC9274N-011 (IC114, 115) ? ? ? ? ? 1 2345678910 11 12 13 14 15 16 17 18 19 20 21 22 23 242526272829303132333435363738394041 42 ? ? ? ? & & & ? & ? & ? & ? & ? & ? & ? & ? & ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? ? ? % ? ? ? ? & ? ? & ? & ? & ? & ? & ? & ? & ? & ? & ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? & ? ? 18 bit Latch Circuit (Rch) (Lch) Same as Rch ( ! ) ! ? & * +, - ? ? . ? ? & * +, - ? ? ! / +0 - ! 1 ? % +1 # 2 +- RadioFans.CN 21 AVR-4802/AVC-A11SR PD4721GS-GJG (IC501) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? SN74LV541APW (IC518, 522, 803)SN74AHCT541PW (IC514) AK5353 (IC114) ? ? ? ? ? ? ? ! ? ? # ? ? ? $ ? ? ? ? ? ? ? ? ? ? ? ? 1 2 3 4 5 6 7 8 ? ? ? ? ? ? ? ? ? ? ? ? ? ? 9 ? ? ? ? ? ! ? ? # % ? ? ? ? ! & $ ? ! & ! ? ? & ? ? ? ? BA4510F (IC115) TK15420MTL (IC601603, 606, 701706, 713) BA15218F (IC116, 118, 309313) NJM2068MD (IC101, 104112, 117, 120, 201204, 301, 302, 304, 306, 308, 402, 404, 471, 506509) NJM4556AD (IC502) NJM5532MD (IC301, 303, 305, 307) ? ? ? ? ? % ? ? ? ? ? ? % ? ? ? ? ? ? ? % ? ? ? ? ? ? ? ? % ? ? ? ? ? ? ? % ? ? ? ? ? ? ? % ? ? 1 2 3 45 7 8 6 1 2 CXA1511M (IC502) ? ? ? ? ? ? ? ? ? ? ! ? ? ? ( ) * ? + , ! -+ -. ( / ? + , ? % # ? # ? ( . ( ? . 0 / ? 1 ? 0 + , ) / ) . 0 /? 2 . ( 3 / ) . 0 / 4 ? . ( / ( ? -? ? 0 + , ) / ) . 0 / ? ? ? ? ? ?5 0? ? ? ? ? ? ? ? ? ? ? ! ? BA033T (IC526, 527) KIA7806API (IC203) KIA7812API (IC701) KIA7820API (IC704, 709, 710) KIA7805API (IC309, 310, 702, 705) KIA7815API (IC707) Output GND Input ? ? ? ? 1. OE or ST 2. GND 3. OUT 4. VDD HG-8002JA33MHZPCCX (Xtal Oscillator) (IC510) SN74AHC1G04DBV (IC109) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 5 0 1 2 3 45 7 8 6 1 2 3 FRONT VIEW 4 5 1. CTL 2. Vcc 3. GND 4. OUT 5. N.C. BA08ST (IC205) TOP VIEW 13 54 KIA7905PI (IC703, 706) KIA7915PI (IC708) Output Input GND Terminal Function No.NameI/OFunction 1AINRIRch analog input pin 2AINLILch analog input pin 3VREFORef. V out pin 4VCOMOCommon V out pin 5AGNDAnalog GND pin 6VAAnalog power pin, +2.7+5.5 7VDDigital power pin, +2.7+5.5V 8DGNDDigital GND pin 9SDTOOSerial data out pin, 2s complement, MSB first out, at power down: L 10LRCKIL/Rch clock pin 11MCLKIMaster clock input pin 12SCLKISerial data clock input pin, A/D data out at SCLK falling edge 13PDNIPower down pin, L: Power down mode 14DIFISerial interface format pin (L: Firward, H: I2S) 15TTLIDigital input level select pin, L: CMOS level, H: TTL level 16TSTITest pin (internal pull-down) RadioFans.CN 22 AVR-4802/AVC-A11SR SN74LV14APW (IC110, 124) SN74LV00APW (IC108, 511, 513) SN74LV02APW (IC515, 519) 1A 1Y 2A 2Y 3A 3Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Vcc 6A 6Y 5A 5Y 4A 4Y 1A 1B 1Y 2A 2B 2Y 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Vcc 4B
