Teac-FD-55-GV-Service-Manual电路原理图.pdf

TEACFD-55AV/GV MINI FLEXIBLE DISK DRIVE MAINTENANCEMANUAL REV.A RadioFans.CN 收音机爱 好者资料库 TEACFD-5SAVGV MINI=XI3LEDISKDRlJE H.INTI:N;_GP.Jl.NU;lL -i- RadioFans.CN 收音机爱 好者资料库 TABLEOFCONTENTS TitlePage SECTION3THEORYOFOPERATION300 3-1CONSTRUCTIONANDFUNCTION301 3-1-1GeneralBlockDiagram301 3-1-2MechanicalSection_302 3-2CIRCUITDESCRIPTIONS307 3-2-1ReadWriteCircuit307 3-2-1-1Modeselector(forreadwritecircuit)309 3- 2-1- 2Rea d cireuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .311 3-2-1-3Writecircuit.315 3-2-1-4Lowvoltagesensor317 3-2-1-5FunctionandoperatingwaveformofreadwriteLSIterminals318 3-2-2ControlCircuit326 3-2-2-1Strapcircuit328 3-2-2-2LEDandheadloadcontrolcircuit.329 3-2-2-3Write/erasecontrolcircuit333 3-2-2-4Mctorongate.335 3-2-2-5Readydetector336 3-2-2-6Steppingmotorcontrolcircuit339 3-2-2-7Trackcounter343 3-2-2-8OtherterminalsandfunctionofcontrolLSI344 3-2-2-9Interfacedriver346 3-2-3ServoCircuit347 3-3FUNCTION OFTESTPOINTSANDVARIABLERESISTORS38 3-3-1FunctionofTestPoints349 3-3-2FunctionofVariableResistors354 -ii- TitlePage SECTION 4MAINTENANCE.4000 4-1GENERAL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4001 4-1-1PeriodicMaintenance4001 4-12CheckandAdjustment.4002 4-1-3MaintenanceJigsandTools4003 4-2PRECAUTIONS. . . . . .4007 4-2-1TorqueAppliedtoScrewsandLockingPaint4007 4-2-2HandlingofConnectors4008 4-2-3HeadCableTreatment4013 4-2-4InitialSettingofSKA-GandSKA4015 4-2-4-1Cableconnectionandsettingofpowersupplyvoltage4015 4-2-4-2Settingofthemaximumtracknumber4018 4-2-4-3Settingofsteprateandsettlingtime.4018 4-2-4-4Leveldiskcalibration4021 4-2-4-5Alignmentdiskcalibration4023 4-2-4-6Humiditysetting4026 4-2-4- 7Setting0fSKAgain4026 4-2-4-8SettingofFDDstrapsandSKAspecialkey4027 4-2-5Others4029 4-3PREVENTIVEMAINTENANCE4032 4-3-1CleaningofMagneticHeadbyCleaningDisk4032 4-3-2DirectCleaning<Singlesided4034 4-4CHECKANDADJUSTMENT4036 4-4-1AdjustmentofSetArmPosition4036 4-4-2CheckandAdjustmentofHolderPosition.4038 4-4-3CheckandAdjustmentofArmLifter4041 4-4-3-1)()ublesided4041 4-4-3-2Singlesided4051 4-4-4CheckofCSSAssY-.f054 4-4-5CheckofFileProtectSensor.4058 4-4-6CheckofDiskRotationSpeed4061 4-4-7CheckofEraseGateDelay4063 4-4-8CheckofHeadTouch4066 -iii- 4-4-9 Title CheckandAdjustmentofAsymmetry Page 4072 CheckandAdjustmentofTrackAlignment.4084 CheckandAdjustmentofTrack00Sensor.4093 CheckandAdjustmentofTrack00Stopper.4100 CheckandAdjustmentofIndexBurstTiming.4105 4077 4080CheckofResolution CheckofReadLevel4-4-10 4-4-11 4-4-12 4-4-13 4-4-14 4-4-15 4-5MAINTENANCEPARTSREPLACEMENT4110 4-5-1ReplacementofHeadCarriageAssy.4110 4-5-1-1 4-5-1-2 Replacementofv-typecarriage ReplacementofL-typecarriage 4110 4117 4-5-2ReplacementofSteppingMQtorAssy4121 4-5-3ReplacementofDDmotorAssy0 ,., CD :xlJJz:x 0 - ,. c: :10 , -l .0 ,.,.,0 V) - ,., Cj)(j)CDz: :xz:x:x -l - .:lC :10I0 0-0 ,. -0.0000 .:;:;:;?1r0lLolJL.:.F0-. rwr10lnh8 76,h. r92J,:hC25 TPe ;JIDIFO RiOO_CTIVErn-.C.I-.J1 2TC24 -In-=-_r-_-:.RW.:.1.:.0-fIool.ff3f-+HEAOf-tl.PRE.0JFFERENHATORI-CJ-:TP7 _ 8L.:.:.SWITCHf-tl.AMPEAK/.:uo.J.:.:._-S-y-6-4Ib- r-v-R01-IT!f-+MATRIXV=:E.ETECTORA t,.10R11r-:-=-LOWVOLTAGESENSOR -.-.J-=-.:;.-4-.1r-.:.:.-.lIDVGGLVsolLVS1tiil.-. -4oYEVCCIITIMEtacP WTr-:-=-rDOMAINlMECONSTAllT -.r-L1l.IWRJTElI-JrIFI LTERC21. C22.RAg liT18-DRIVER l.!. ,.9COM1r;-;:- SIol-E1-:r-t-+-.-H-:=.!.-I.19ItCOMI.IONItEJ HEADHJ,.EVCCDRI VeilrJI .Ir lr-+-=COMOr-I1 Crl3.;R12illt,WRllE.Ir- L_+-NvAr-if-+-_E:.!:D1-1mHERASEleuRRENT/IiRJTECONlR0L :114-=-:;-+-. DRJVEIlSOURCElOG IC t,tttIfR0DRJVERr-r-,.-I-.-.-.-, 4UD6;D Rl1OVEGNDI.,-:nc:,.,l.J),-,:llCI .-J.IVI.-+-t- -.l0nntnI0II:;)C)I-<LJ oVIVIIII 0 I- -.tIWRI1ECURRENTIOUTPUT 1SY),lMETRYADJUSTOR5WJTCHTPc IIDRIVER ftRe.R9.Q1 ,I- w a CD 3-2-1-1.Modeselector Modeselectorisconstructedwiththeswitchfilterandwritecurrent switch,whichareusedonlyfor96tpimodels. Table301showstheswitchingconditionofthereadwritecircuitby thetrackswitchsignal(SFsignalintheschematicdiagram)fromthe controlcircuit. (1)Switchfilter SwitchfilterisusedonlyinGmodelandinoptionalFmodelfor eliminatingtheinfluenceofsaddlewaveform(refertoFig.304)atthe outertracks.WhentheSFsignalisHIGHlevel,theoutputoftheNPN transistors,Q7andQ8(includesresistorsintrnally)becomesLOW level.Thentheswitchfiltercapacitors,C30andC3lareactivatedto increasethecapacityofthelowpassfiltercapacitor,C29.Thisstate istheOn-stateoftheswitchfilter,andthecut-offfrequencyofthe lowpassfilterissettolow. (2)Writecurrentswitch WritecurrentswitchisusedonlyinE,F,andGmodelsandusedfor makingthewritecurrentinoutertracks(track00totrack43)higher thanininnertracks(track44totrack79)toimprovetheover-write (write2FafterIFwriteandmeasuretheresidualfrequencycomponents ofIF)andsholdercharacteristics. Writecurrentissuppliedtothewritedriverbywritecurrentsource inthereadwriteLSI,US.Thesuppliedvaluefromthiscurrentsource canbecalculatedfromthefollowingexpressioncombiningtheexternal resistorsR9,R8,andQl(ONatoutertracks). 13.212.7121 Outertracks:Iw=+-O.-No. -309- 13.2 Innertracks:Iw=-0.12-No.2 R9 (Reference) Erasecurrentiscalculatedfromthefollowingexpression.Write currentisnotswitcheddependingonthetrckposition. Ie=10.8-No.3 Rll(orR12) Modelsandtrackposition SwitchingitemA,B(48tpi)E,F(96tpi).G(96tpi,highdensity) alltracksTr.00V43Tr.44V79Tr.0QV43Tr.44.,79 SFsignal . . HHLHL Switchfilter I NocircuitONOFFONOFF Writecurrentsw.ConstantNo.1No.2No.1No.2 (Currentexp.)No.2 ErasedriverConstant + (Currentexp.)No.3 (Table301)Switdhingfunctionofmodeselectorforreadwritecircuit -310- 3-2-1-2.Readcircuit Thereadcircuitconsistsofheadmatrixswitch,pre-amplifier, lowpassfilter,differentiationamplifier,peakdetector,timedomain filter,andoutputdriver.Maincircuitsareenclosedintheread writeLSI,US. Theminutevoltageinducedinreadoperationbytheread/writeheadis inputtopre-amplifierviamatrixswitchforselectingside0/1heads. Thepre-amplifierhasthreegainsettingterminals,GSa,GSIandGSC. InAFmodels,GSO-GSCisshortedtoobtainthegainof100times, whileGSl-GSCisshortedinGmodeltoobtainthegainof200times. Thepre-amp.outputissuppliedtothedifferentiationamplifiervia thelowpassfilterandtheswitchfiltertoliminateundesirablehigh frequencynoises.Thedifferentiationamplifierphase-shiftsthepeak positionofthereproducedwaveformtozerocrosspoint,andatthe sametime,furtheramplifiesthesignalwiththemostappropriate equalization.Thepeakdetectorconstructedwithacomparatorconverts thedifferentiatedoutputafterpassingthroughthecouplingcapacitors, C24andC25intoaquarewave. Thetimedomainfiltereliminatesavirtualpulsecausedbythesaddle inthelowfrequencyarea(IFarea,62.5KHzforAFmodels,125KHz forGmodel)atoutertracks.Thetimedomainfilterisconstructed withtwoedgedetectors,delaysingleshot,readdatalatch,anddata singleshot.ThenthesignalisoutputfromtheFDDthroughtheRD driverandtheoutputdriver. IntheRDdriver(3-stateoutput)ofthereadwriteLSI,US,there aresomegates.TotheTDCRterminalforpulsewidthsettingofdelay singleshotm.v.,controlsignalfromthecontrolcircuit(OPEN/ROYO/ APSsignal)isinputinparallel.Thesecontrolsignalsaredifferent dependingonPCBissuenumbers(A0,E,orF)andPDDmodels(PCBA versions).Anyway,theFDDissosetthattheRDterminaloutputs positivereadpulsesatreadoperation.Table302showsthecontrol function. -311- PCBTypicalRDoutputcontrol NopositivepulseoutputsonRD issuePCBAterminalat: No.Version TDCRorNVDS (RDoutput:LOWlevel) AD-00A-COPENHLDuringwriteoperation ( -04A-C(InternalcontrolofLSI) -14,A,BRDYOHLDuringwrite+Drivenot-READY (RDYO:LOW) _. E-08,B,CAPSHLDuringwrite+Duringmotorstart- -lOAting(36OV380msafterMON)+ Head -lSAseekoperation FV-OOD. OPENHHThesameas-0Qt.04ofPCBissue -040.A-D. -080.RDYOHHThesameas-14A-DofPCBissue -lOB-A-D. -14CV -ISH SpecialRDYOAPSHDuringwrite+Drivenot-READY +Head,seekoperation. (Table302)RDoutputcontrolofreadwriteLSI -312 - Magnetization ondisk Pre-amp.output (TP4) Pre-amp.output (TP5) Differentiation amp.output(TP7) Differentiation amp.output(TP8) -l-+-:_-:;-Jt-_t-.;:.r;:._-2.5V, approx. .L.-l-.:,.-+-:.-=:-;f-l-:To.,.-1 . 1v,approx. Read (c)DIFO(pin1,pin44) -1.lV,approx, write Differentialoutputterminalsofthedifferentiationamplifier. Thephaseofpin1and44areoppositeeachother. Read (d)CI(pin43,pin42) 2.7V,approx. write 2.7V,approx. Differentialinputterminalofthecomparator(peakdetector).The phaseofpin43and42areoppositeeachother. fVfV -j+-W-+-2 5V,approx. Read (3)Timedomainfilter (a)TDCR(pin40) -2.5V,approx. write Pulsewidthsettingterminalofthedelaysingleshotm.v.Some modelsusethisterminalfortheinhibitgateoftheRDpulseoutput. WhilethisterminalisforcedtobeLOWlevel,thedelaysingleshot -320- donotoperateandnoRDpulseisoutput.RefertoTable302. 1.5V,approx. Delaysingleshot pulsewidth Read (b)RDCR(pin39) l Write:1.5V,approx. Readinhibit:0.7V,approx. PulsewidthsettingterminalfortheRDoutputpulse. r-RD 2V,approx. pulsewidth Read (4)Writecircuit (a)COMO(pin21),COMl(pin19) -2V,approx. write,:.:.:.:.:-_. ROYOAPSVGEGLVS FRONTLED W 10 STEP .J WRllEGAlE MOTORON INDElC TRACK00 WRllE PROTECT READYI DISKCHANGE l.40N1 l.40NO DSEl I ISTP ill DeDO IDXO TOO WPO RDYO STRAPS-+-J RY.Xl LSI U3 CLOCK I1 CLOCK GENERATOR STEPPING MOTOR INDEX SENSOR -. I . LEW I ov+ L:A.SMODEL(4BtDI)_ HEGMODEl(96tcl) L :AFMODELC300rorn) HGMODEl(360rorn) L.-._-=:.:_-.=,3.0nCFORSPINDLE MOTO 3-2-2-1.Strapcircuit Inordertoselectthevariousfunctionbyusers,variousstrap postsareavailable.RefertotheSpecificationitems1-11and1-12 as.tothedetailsofstrapfunction. Somemodelshavenotstrapposts.Thesemodelshavesolderedjumping wiresinsteadofthestrapposts,andefunctionisfixed.(Refer totheversiontableintheschematicdiagraml. -328- 3-2-2-2.LEDandheadloadcontrolcircuit ThecircuitsconsistsofLED/Headloadgate,overdrivetimer1,LED driver,solenoiddriver,andoverdrivecircuit1. (1)LED/Headloadgate TotheLED/HeadloadgateinthecontrolLSI,U3,DRIVESELECT(DSEL) andINUSE(IU/HEADLOAD(IHL)signalsareinput. AccordingtotheselectedfunctiondesignatedbythestrapsUl(USI signal)andU2(US2signal),theseinputsignalsaregatedtooutput totheLEDdriverandthesolenoiddriverasOLEOandHLCsignals. (a)DLEDsignal Asignaltoturnonthefrontbezelindicator(LED). WhilethissignalisLOWlevel,theLEDturnson. StrapsettingU3inputLEDoncondition(OLEOLOW) UlU2USIUS2 (NoelationtoHLstrapapprox.)i SODoutput(opendrain)fromtheLSIbecomesLOWlevel.Referto Fig.313. -340- DIRECTION SELECT(Jl-18,IDIR) Step-out Step-in PNB _-IJ_-.L_.L- .L.-_-L._i50ms.arox. Internalstepgen.inU3 . Is-J Overdriveoperatlon L.-.+-+-+-:.-+-i PB PNA Coildriverinput PA SOD(Overdrivetimer2) output STEP(Jl-20,ISTP) DirectionlatchinU3 96tpi(or48tpi,3.6): tlt2 PNB PB PNB SOD(Overdrivetimer2) output Coildriverinput PA 48tP:ternalstepgen.inU3_-_+-+-a-I-(-;-s-:-r-ox-)_IOms:jprox. 14-+-+-+-+-+-<r-I tltl 1 t2.11_t2 tl:Internalstepdelay(3msec,approx.) t2:Partial2-phaseactivatingperiod(O.6ms,approx.) (Fig.3l2)Steppingmotorcontrolcircuitwaveform -341- Finalinternalsteppulsen inU3-J1_ SODoutput T-_ 12V,approx. Appliedvoltagetomotor coils .IIllV,approx. -.J.-4V,approx. 1 -t-OV sOms,approx.1 Overdriveperiod (Fig.313)Steppingmotoroverdrivetiming (6)Overdrivecircuit2 TheSODsignalisinputtothePNPtransistorQ6whichconstructsthe overdrivecircuit2anditmakesQ6turnonduringLOWlevel.Atthat time+12Vpowerisappliedtothesteppingmotorcoilstoexecute theseekandsettlingoperationssecurelywithhightorque. Afterthecompletionofthesettling,only+SVpowerissuppliedtothe coilsthroughthediode,CR3whichminimizethepowerlossbysupplying onlytherequiredtorqueforholdingthestopposition.Bytheabove design,heatradiationisdecreasedtotheminimumlevelandthepower consumptionofthesteppingmotorinseekstopisonlyO.2SW,approx. -34;,;. 3-2-2-7.Trackcounter Trackcountermemorizesthetrackpositionandoutputstrackswitch(SP) signalforthereadwritecircuit.ItalsooutputsTOO(TRACK00) signaltothehostcontroller.Allthecircuitsareenclosedinthe controlLSI,U3.Thefunctionofthiscircuitisusedonlyin96tpi models.Refertoitem3-2-1-1. Theoutputsignalfromthetrack00sensor(TP3)issuppliedtoTOS terminaloftheLSIandisoutputastheTOOsignalthroughthegate inthetrackcounter.TheTOOsignalbecomesTRUEinthefollowing conditions. TOO=TOSxStepoutxPA NotesTOO:Track00detectedatHIGH. TOS:Track00sensoroutputatTP3(TOSinputofLSI)isHIGH. Track00sensordetectsthelightdisturbingwingofthe headcarriage(track00position). Stepout:Directionlatchoutputinitem3-2-2-6isstep-out direction. PA:PAoutputfromsteppingmotorcontrolcircuitisHIGH. PhaseAcoilofthemotorisactivated. WhentheTOOsignalbecomesTRUE(HIGHlevel),thetrackcounters constructedfromup-downcountersarereset.Ifastep-inoperation isexecuted,thecounterstepsupandtheSFoutputchangestoLOWat 44thtrack.Refertoitem3-2-1-1astothefunctionoftheSFsignal. Track0043:SFsignalHIGH. Track4479:SFsignalLOW. 343 3-2-2-8.OtherterminalsandfunctionofcontrolLSI FollowingexplainsotherterminalsandfunctionofthecontrolLSI,U3. (1)APSoutputterminal APSsignalbecomesTRUE(HIGHlevel)inthefollowingconditions. ThesignalisusedtoinhibittheRDoutputpulseinsomeoptional models. APS=MONdelay1+SEEK NotesMONdelay1:InternalsignalofLSI.Spindlemotorisunder startingoperation.(SeeFig.311). SEEK:InternalsignalofLI.Theheadisunderseekoperation (1012msecfor96tpiand1315msecfor48tpiafter thelaststeppulse). (2)OSCI,OSCOterminalsandclockgenerator ItsuppliesclocksforoperationtoallthecircuitsintheLSIby externalceramicoscillator. (3)LVSinputterminal LVSsignalinputterminalfromthereadwriteLSI. WhenitisLOW,allthecircuitsinthecontrolLSIarereset. (4)OINVinputterminal TerminaltoinvertthelevelofthecontrolLSIoutputsignalswhich areusedasoutputsignalstothehostcontroller.Theterminalis fixedtoHIGHlevelinthisFDDandHIGHoutputisTRL_ (5)PSE1inputterminal -344- Inputterminalforpowersavecontrol. ThisfunctionisnotusedinthisFDDanditisfixedtoHIGHlevel. (6)SPCoutputterminal Outputterminalforpowersavecontrol. ThisfunctionisnotusedinthisFDD(opencondition). (7)MCKoutputjREinputterminal (a)LSI No.2206-00LH5060:MCKoutputterminal.Notused,open. (b)LSI No.2206-00LH5060Aor5060B:REinputterminal Executeauto-recalibrationatLOWlevel. (8)OCR,OCDOterminalsanddiskchangecircuit DiskchangecircuitgeneratesDISKCHANGEsignalwhichindicates thatthediskisremovedfromtheFDD.Itisusedonlyinsomeoptional modelswithdisksensor. tlhenadiskisremoved,theDISKsignalfromthedisksensorbecomes LOWlevelandsetstheflip-flopinthediskchangecircuit.This isthediskchan