Sansui-Micro-750-D-Service-Manual电路原理图.pdf

CONTENTS SERVICE PRECAUTIONS . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 PRINTED CIRCUIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22-28 BLOCK DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21 REPLACEMENT PARTS LIST . . . . . . . . . . . . . . . . . . . . . 29-42 IC INTRODUCTION SERVICE MANUAL MODEL CRO 750D CAUTION : Before servicing this chassis, read the PRODUCT SAFETY SERVICE FOR VIDEO PRODUCTS section on page 3 of this manual. DVD and CD PLAYER Under license form Digital Theater Systems, Inc. MI RadioFans.CN 收音机爱 好者资料库 CAUTION: DO NOT ATTEMPT TO MODIFY THIS PRODUCT IN ANY WAY AND NEVERPERFORMCUSTOMIZEDINSTALLATIONSWITHOUT MANUFACTURERS APPROVAL. UNAUTHORIZED MODIFICATIONS WILL NOT ONLY VOID THE WARRANTY, BUT MAY LEAD TO YOUR BEING LIABLE FOR ANYRESULTINGPROPERTYDAMAGEORUSERINJURY. SERVICEWORKSHOULDBEPERFORMEDONLYAFTERYOUARE THOROUGHLY FAMILIAR WITH ALL OF THE FOLLOWING SAFETY CHECKS ANDSERVICINGGUIDELINES.TODOOTHERWISE,INCREASESTHERISKOF POTENTIALHAZARDSANDINJURYTOTHEUSER. WHILE SERVICING, USE AN ISOLATION TRANSFORMER FOR PROTECTION FROMA.C.LINESHOCK. AFTERTHEORIGINALSERVICEPROBLEMHASBEENCORRECTED,ACHECK SHOULDBEMADEOFTHEFOLLOWING. 1. BE SURE THAT ALL COMPONENTS ARE POSITIONED IN SUCH A WAY AS TO AVOID POSSIBILITY OF ADJACENT COMPONENT SHORTS. THIS IS ESPECIALLYIMPORTANTONTHOSEMODULESWITCHARE TRANSPORTEDTOANDFROMTHEREPAIRSHOP. 2. NEVER RELEASE A REPAIR UNLESS ALL PROTECTIVE DEVICES SUCH AS INSULATORS, BARRIERS, COVERS, SHIELDS, STRAIN RELIEFS, POWER SUPPLY CORDS, AND OTHER HARDWARE HAVE BEEN REINSTALLED PER ORIGINAL DESIGN. BE SURE THAT THE SAFETY PURPOSE OF THE POLARIZEDLINEPLUGHASNOTBEENDEFEATED. 3. SOLDERING MUST BE INSPECTED TO DISCOVER POSSIBLE COLD SOLDER JOINTS, SOLDER SPLASHES OR SHARP SOLDER POINTS. BE CERTAINTOREMOVEALLLOOSEFOREIGNPARTICLES. 4. CHECK FOR PHYSICAL EVIDENCE DF DAMAGE OR DETERIORATION TO PARTSANDCOMPONENTS,FORFRAYEDLEADSANDDAMAGED INSULATION (INCLUDING A.C. CORD), AND REPLACE IF NECESSARY FOLLOWORIGINALLAYOUT,LEADLENGTHANDDRESS. 5. NO LEAD OR COMPONENT SHOULD TOUCH A RECEIVING TUBE OR A RESISTOR RATED AT 1 WATT OR MORE. LEAD TENSION AROUND PROTRUDINGMETALSURFACESMUSTBEAVOIDED. 6. ALLCRITICALCOMPONENTSSUCHASFUSES.FLAMEPROOFRESISTORS, CAPACITORS, ETC. MUST BE REPLACED WITH EXACT FACTORY TYPES, DO NOT USE REPLACEMENT COMPONENTS OTHER THAN THOSE SPECIFIEDORMAKEUNRECOMMENDEDCIRCUITMODIFICATIONS. 7. AFTER RE-ASSEMBLY OF THE SET, ALWAYS PERFORM AN A.C. LEAKAGE TEST ON ALL EXPOSED METALLIC PARTS OF THE CABINET, (THE CHANNELSELECTORKNOB,ANTENNATERMINALS.HANDLEAND SCREWS) TO BE SURE THE SET IS SAFE TO OPERATE WITHOUT DANGER OF ELECTRICAL SHOCK. DO NOT USE A LINE ISOLATION TRANSFORMER DURING THIS TEST, MAKE SURE TO USE AN A.C. VOLTMETER. HAVING 5000 OHMS PER VOLT OR MORE SENSITIVITY, IN THE FOLLOWING MANNER; CONNECT A 1500 OHMS 10 WATT RESISTOR, PARALLELED BY A.15 MFD. 150V A.C. TYPE CAPACITOR BETWEEN A KNOWN GOOD EARTH GROUND (WATER PIPE, CONDUIT, ETC.) AND THE EXPOSED METALLIC PARTS, ONE AT A TIME. MEASURE THE A.C. VOLTAGE ACROSS THE COMBINATION OF 1500 OHM RESISTOR AND 15 MFD CAPACITOR. REVERSETHEA.C.PLUGANDREPEATA.C.ANYVOLTAGE MEASUREMENTS FOR EACH EXPOSED METALLIC PART. VOLTAGE MEASURED MUST NOT EXCEED 75 VOLTS R.M.S. THIS CORRESPONDS TO0.5MILLIAMPA.C.ANYVALUEEXCEEDINGTHISLIMITCONSTITUTESA POTENTIALSHOCKHAZARDANDMUSTBECORRECTEDIMMEDIATELY. THE LIGHTNING FLASH WITH APROWHEAD SYMBOL. WITHIN AN EQUILATERAL TRIANGLE, IS INTENDED TO ALERT THE SERVICE PERSONNELTOTHEPRESENCEOFUNINSULATEDDANGEROUS VOLTAGETHATMAYBEOFSUFFICIENTMAGNITUDETO CONSTITUTEARISKOFELECTRICSHOCK. THE EXCLAMATION POINT WITHIN AN EQUILATERAL TRIANGLE IS INTENDEDTOALERTTHESERVICEPERSONNELTOTHE PRESENCE OF IMPORTANT SAFETY INFORMATION IN SERVICE LITERATURE. SAFETYCHECKS SUBJECT:FIRE the lower 8 bits are used for 8-bit register transfers. Data transfers are 16-bit wide. 138HRST# TTLSchmitt Input 50K pull up Host reset. This signal is referred to as hardware reset and it is used by host to reset the MT1368. CLV/CAV Varipitch interface 140VPVDDPowerPower pin for varipitch VCO circuitry. 141VCOCINAnalog InputConnect capacitor for compensator loop filter. 142VPVSSGroundGround pin for varipitch VCO circuitry. Miscellaneous 139PRST# TTLSchmitt Input 50K pull up Power-on reset, low active 143TEST TTL Input 50K Pull-Down Test mode control pin, high active Lag and Programmable I/O Interface 145FLAGDTTL I/OServo DSP flag. 146FLAGCTTL I/OServo DSP flag. 147FLAGBTTL I/OServo DSP flag. 148FLAGATTL I/O Servo DSP flag. The internal flags of servo DSP can be selected to output through FLAGA, FLAGB, FLAGC, and FLAGD pins. To program the selection the micro controller must write FLGMOD register. 150IO3 TTL I/O 50K pull high At non-flash mode: programmable I/O or internal non-servo flags output. At flash mode cycle: to monitor DSVSEL to device master or slaver. It is recorded on DEVSEL102hRW6. 151IO2 TTL I/O 50K pull high At non-flash mode cycle: programmable I/O or internal non-servo flags output. At flash mode cycle: flash ROM address FLASH_ADR16. 152IO1TTL I/O At non-flash mode cycle: programmable I/O or internal non-servo flags output. At flash mode cycle: flash ROM output enable FLASH_OE#. 153IO0 TTL I/O 50K pull high At non-flash mode cycle: programmable I/O or internal non-servo flags output. At flash mode cycle: flash ROM write enable FLASH_WR#. SIO interface & Defect 154SDATATTL I/ORF serial data input/output. 155SDENTTL outputRF serial data latch enable 156SLCKTTL outputRF serial clock output 157BDO TTL Input 50K pull down Flag of defect data input status Digital Power & Ground 57,75,104,1 44 DVDD3Power+3.3V use for Internal digital circuitry and digital output pad 16,65,109, 133,100 DVDDPower+5V use for Internal digital circuitry and digital output pad 21,35,68,8 4,115,121,1 27,133,149 96 DVSSGroundInternal digital circuitry and digital output pad. 12 D1870 BLOCK DIAGRAM RFZC/ TEZC Circuit RF flag Interface Data Slicer Data PLL Servo ADC Serial RF Controller Servo DSP PDM & PWM DAC Flags & Program- mable I/O Varipitch CLV Clock Generator PWM DAC CLV/CAV Controller EFM/EFM+ Demodulator Subcode/ID Demodulator Sync Protection CIRC/RSPC Error Corrector CDROM Sync Detection Descrambler C3 Decoder Varipitch System Clock Generator DRAM Clock Generator Reset Logic Buffer Memory Controller 256 SRAM Key/LED Interface Mega Interface Micro-controller Interface CSSHost Data FIFO ATAPI Packet FIFO Host/MPEG Interface System Clock RFRPSLV TEZI TEZISLV HRFZC ADCVDD FEI TEI RFRP RFLEVEL ADIN ADCVSS SLCK SDEN SDATA FDO TRO FMO PWMOUT1 PWMOUT2 PDMVDD PWM2VREF PWMVREF PDWVSS FLAGA FLAGB FLAGC FLAGD IO3:0 TEST PRST# RD15:0 RA11:0 RAS# CAS# CASH#/RWEH# RWE# ROE# CLK CKE DOM BA(1:0) EJ/STOP# PLY#/PAU# LED TRAYIN# TRAYOUT# LIMIT# TROPENPWM TRCLOSE BDO RFDTSL SCO RF N RF P PLLVDD REF LPFN LP N PLLVSS J TFN PDO LPFO LP P VBDPLL J TFO XTALO XTAL PLLVDD PLLVSS DMVDD DMVSS URST# VPVDD VCOC N VPVSS ENDM FG DMO HD15 0 PD AG# DASP# HRST# D OW# D OR# DMACK# HA2 0 CS1FX# CX3FX# DMARQ ORDY NTRQ OCS16# URD# UALE UCS1 UCS2 UWR# U NT# UAD7 0 13 VS3811 PIN ASSIGNMENTS NameNumberI/ODefinition VCC 1,9,18,27,35,44,51,59,68,75,83,92,99 , 104, 111,121,130,139,148,157,164, 172, 183, 193,201 I 3.6 V power supply. LA21:023:19,16:10,7:2,207:204ODevice address output. VSS 8,17,26,34,43,52,60,67,76,84,91,98,1 03,112,120,129,138,147,156163,171, 177,184,192,200,208 I Ground. RESET#24IReset input, active low. OTDM transmit data. TDMDX RSEL 25 I ROM Select RSELSelection 016-bit ROM 18-bit ROM TDMDR28ITDM receive data. TDMCLK29ITDM clock input. TDMFS30ITDM frame synch. DMTSC#31OTDM output enable, active low. TWS32OAudio transmit frame sync. SEL PLL2:033I Select Pll1. SEL-PLL2SEL-PLL0Clock Output 002.5*DCLK 013*DCLK 103.5*DCLK 114*DCLK TSD3:038,37,36,33OAudio transmit serial data port. MCLK39I/OAudio master clock for audio DAC. TBCK40I/OAudio transmit bit clock. SPDIF DOB M 41O S/PDIF (IEC958) Format Output. RSD45IAudio receive serial data. RWS46IAudio receive frame synch. RBCK47IAudio receive bit clock. APLLCAP48IAnalog PLL Capacitor. XIN49ICrystal input. XOUT50OCrystal output. DMA11:066:61,58:53ODRAM address bus. DCAS#69OColumn address strobe, active low. OOutput enable, active low.DOE# DSCK EN 70 IClock Enable, active low. DWE#71ODRAM write enable, active low. DRAS2:0#74:72ORow address strobe, active low. 14 NameNumberI/ODefinition DB15:096:93,90:85,82:77I/ODRAM data bus. DCS1:0#97,100OSDRAM chip select 1:0, active low DQM101OData input/output mask. DSCK102OClock to SDRAM. DCLK105IClock Input (27 MHz) YUV7:0115:113,110:106O8-bit YUV output. PCLK2XSC N 116I/O 2X pixel clock. PCLKQSCN117I/OPixel clock. VSYNCH#118I/O Verticalsynchforscreenvideo interface, programmable for rising or falling edge, active low. HSYNCH#119I/O Horizontalsyncforscreenvideo interface, programmable for rising or falling edge, active low. HD15:0141:140,137:131,128:122OHost data bus HCS1FX#152OHost select 1. HCS3FX#153OHost select 3. HIOCS16#151IDevice 16-bit data transfer. HA2:0158,155:154I/OHost address bus. VPP159I Peripheralprotectionvoltage.See App Note 2. HWR#/DCI_ACK#149I,O Host write/DCI Interface Acknowledge Signal, active low. HRD#/DCI_CLK150 O, O Host read/DCI Interface Clock. HD15:0141:140,137:131,128:122I/OHost data bus. HWRQ#142OHost write request. HRDQ#143OHost read request. HIRQ144I/OHost intrrupt. HRST#145OHost reset. HIORDY146IHost I/O ready AUX7:0169:165,162:160I/OAuxiliary ports. LOE#170ODevice output enable, active low. LCS3:0#176:173OChip select 3:0, active low. LD15:0197:194,191:185,182:178I/ODevice data bus. LWRLL#198ODevice write enable, active low. LWRHL#199ODevice write enable, active low. NC37,38,42,203:202No Connect pins. Leave open. 15 VS3811 BLOCK DIAGRAM 16 CS4955 PIN ASSIGNMENTS PIN NAMENUMBERTYPEDEFINITION V7:08,7,6,5,4,3,2,1INDigital video data inputs CLK29IN27MHz input clock PADR16INAddress enable line XTAL-IN15INSub-carrier crystal input XTAL-OUT14OUTSub-carrier crystal output HSYNC/CB10I/OActive low horizontal sync, or composite blank signal VSYNC11I/OActive low vertical sync FIELD/CB9OUTVideo field ID. Selectable polarity or composite blank RD27INHost parallel port read strobe, active low WR28INHost parallel port write strobe, active low PDAT7:019,20,21,22,23,24,25,26I/OHost parallel port/general purpose I/O SDA32I/OI C data SCL33INI C clock input CVBS44CURRENTComposite video output Y48CURRENTLuminance analog output C47CURRENTChrominance analog output R39CURRENTRed analog output G40CURRENTGreen analog output B43CURRENTBlue analog output VREF38I/OInternal voltage reference output external reference input SET37CURRENTDAC current set TTXDAT30INTeletext data input TTXRQ31OUTTeletext request output INT12OUTInterrupt output, active high RESET34INActive low master RESET TEST13INTest pin. Ground for normal operation VAA36,41,46PS+5V or +3.3Vsupply(must be same as VDD) GNDD18PSGround VDD17PS+5V or +3.3Vsupply(must be same as VAA) GNDA35,42,45PSGround CS4955 BLOCK DIAGRAM 17 PCM1723 PIN ASSIGNMENTS PCM1723 BLOCK DIAGRAM PIN NAMENUMBERTYPEDEFINITION XTI1INMaster clock input SCKO2OUT System Clock Out. This output is 256fs or 384fs.System clock generated by the internal PLL. VCP3PWRPLL Power Supply (+5v) NC4N/ANo connection MCKO5OUTBuffered clock output of crystal oscillator ML6INLatch for serial control data MC7INClock for serial control data MD8INData for serial control RSTB9IN Reset input. When this pin is low, the digital filters and modulator are held in reset ZERO10OUT Zero Data Flag. This pin is low when the input data is continuously zero for more than 65.535 cycles of BCKIN VOUTR11OUTRight Channel Analog Output AGND12GNDAnalog Ground VCC13PWRAnalog Power Supply(+5v) VOUTL14OUTLeft Channel Analog Output CAP15Common pin for analog output amplifiers BCKIN16INBit clock for clocking in the audio data DIN17INSerial audio data input LRCIN18INLeft/Right Word Clock. Frequency is equal to fs NC19N/ANo connection RES20N/AReserved for factory use, do not connect VDD21PWRAnalog Power Supply(+5v) DGND22GNDDigital Ground PGND23GNDPLL Ground XTO24OUTCrystal oscillator output Note:(1)Schmitt triger input with internal pull-up resistors. (2)Schmitt triger input. 18 19 BA6208 41 58 BA6208F AINBOUTAOUTBIN H H HH H HL L LL L L L L OPEN OPEN BA6208 EQUIVALENT CIRCUIT DIAGRAM NOTE : Figures in parentheses are for the BA6208F BA6208 INPUT/OUTPUT TRUTH TABLE BA6208 EXTERNAL DIMENSIONS 6(1) 5(3,7) 7(2) 8(4) 3(8) 2(5) B O U T V C CG N D BIN AIN A O U T Q 1 8 Q 2 R 3 2 R28 R25 Q 7 R 3 1 R29 Q 4 Q5 D 1 R1R 11 R 2 Q 1 Q 1 5 R 2 6 R30 Q 8 Q 1 7 R 4 Q 1 2 R 6 R 1 3 R 8 Q 11 R 2 0 R18 R 5 D2 R3 R 1 5 R27 R23 R 7 R 1 9 R 9 Q 1 4 R 1 6 Q 1 0 R 1 0 Q 2 0 R 1 2 R17 Q 1 3 R 2 2 Q 9 Q6 R 1 4 Q 1 9 R 2 4 R21 Q 1 6 Q 3 19 NJW1104 EXTIN 7KHz LPF SW. ControllerADD/SUB L+R L-R Center Mode Modified B-NR MCU Interface Delay Input Autobalance Noise Sequencer Adaptive Matrix RIN LOUT COUT ROUT SOUT LIN DATA SCK REQ AUX1-10 MD1 MD2 SYSTEM BLOCK DIAGRAM 20 NJW1104 MEMORY CONTROL MCU INTERFACE L+R L-R COMBINNING NETWORK VCA x 8 MEMORY CENTER MODE CONTROL Surround S ignal selector VCA VCA CONTROL NOISE SEQUENCER NOISE GENERAT OR Signal/Test tone s elector ADD/SUB. L,Rch mode se lector MODIFIED B-NR Sch mode s elector LPF and A /D D/ACONVERTOR +5V +10V VDD VCC 24 OSC + + u-COM DATA SCKREQ RST TEST CNT 27p 27p 4MH 1M 100u 100u C21C20 100n C18 100n C19 R12 X1 C17 C16 R11 47K 14 15 16 17 18 19 20 21 22 23 80 VSS 1 SWITCH CONT ROL MD1 MD2 AUX1 AUX2 AUX3 AUX4 AUX5 AUX6 AUX7 AUX8 AUX9 AUX10 2 3 4 5 6 7 8 9 10 11 12 13 79 64 65 GND + + + + Lin Rin 100n 22n 22K 22K 10u 10u 22u 4 7n 100K 47u 22u 4 7M 100n 7 5K 7 5K 100n 100n 15K 15K 47K 47K 100n 680p 680p C10 C11 R7 R8 C15 C14 R10 C13 C12 R9 C9 C8 R6 R3 C7C5 R5 R2 R4 R1 C6 C4 C3 C2 C1 78777675747372717069686766 IREF VREF POLARITYSPRI TTER RECTIFIER & LOG AMPRIFIER + + 4.7u 220n 220n 100n 47n 47n 100n 100n 22n C57 C56 C55 C54 C53 C52 C51 C50 C49 63 62 61 60 59 58 57 56 55 54 41 + + + + EXTin Sout Cout Rout Lout + 680n 330K 10u 10u 10u 10u 10K 20K 100n 47K 10u 100K 220n 220n 4.7u C48 C47 R26 + 220u C46 C45 100n C44 R25 R24 R23 C42 C41 C40 C39 C38 C37 R22 53 52 51 50 49 48 47 46 45 44 43 42 4025 3.3n 680p680p 3.3n 10n10n 22n22n 18K15K 10K 15K7.5K 7.5K 10K 24K 10K 5.6n68n C36C35 R21 R20 C32 C31 R19 R18 R17 3.3n C30 R16 C29 C28C27 C26C25 R15 R14 R13 C24 3938373635343332313029282726 APPLICATION CIRCUIT AND BLOCK DIAGRAM 21 A750 KEY CIRCUIT PRINTED CIRCUIT 22 A750 POWER CIRCUIT 23 A750 MIC CIRCUITA750 PHONE CIRCUIT 24 A750 AMP CIRCUIT 25 A750 KEY BOARD A750 MIC BOARD A750 POWER BOARD 26 A750AMP BOARD 27 DSM750 DECODER BOARD 28 PART No.PART NAMEQTY b0882A750AMP ASSY1 bS7100-1DVD-750 POWER ASSY1 b1053-1A750 KEY ASSY1 bS7091-1A750 MIC ASSY1 b0883DSM750 DECODER ASSY1 bS8001KHM-232B LOADING ASSY1 S0549bA750 TRANSFORMER1 S3284CC-1.0251501 S3145aCC-1.012140(B=6)1 S3287CC-0.5241851 S3288CC-1.25151151 S3278A750AMP OUTPUT WIRE1 S3279A750 OPEN/CLOSE WIRE1 S3281A750 LOADING WIRE1 S3