Primare-CD31_MKII-cd-sm 维修电路原理图.pdf

PRIMARE CD31 MKII Service Manual RadioFans.CN 收音机爱 好者资料库 1. Schematics and Pcb. Confidential ! This document is not allowed to show for third part without written permission from Primare Systems AB. This document is subject to change without notice. Author: Bjorn Holmqvist Primare AB RadioFans.CN 收音机爱 好者资料库5544332211DDCCBBAA文件编号：审核：CD31 MKII文件名称：前控板原理图主机型号：页次：日期：拟制：1/12006-06硬件版本：IR2RXDLED_SDAP_SCLSPI_DATAIR_INTXDVFD_BUSYSCLIR_INSPI_DATASPI_CSSPI_CSP_SCLLED_SCLP_SDASDATXDR X DSPI_CLKIR_INPUTP_SDASPI_CLKIR2IR_SELSCLPOWER_ISPSDASCLPOWER_ISPIR_SELVFD_BUSYSDAVFD_BUSYVFD_RSTIR2CTRLCTRLP5VD5VP5VP33VP5VP33VD5VP5VP5VP5VD5VP33VP5VP5VP5VP33VD5VP33VP5VP5VP5VP5VP5VD5VD5VP5VP5VP5VP5VP33V4Q22SA10154U1SAA1064T123456789101112131415161718192021222324ADRC E XTP8P7P6P5P4P3P2P1MX1VEEV C CMX2P 9P 10P 11P 12P 13P 14P 15P 16S D AS C L4C41044R84K7GP18074U21234R21104U474HC16587654321910111213141516GND/Q7D7D6D5D4CLKLDQ7DIND0D1D2D3/CEVCC4K14K64K5LED1 KG25004321A2K2A1K14K44R94K74C21044C61044R74K7+4C147uF+4C547uF4R22 8204R54K74C141044R23 8204R24 8204R64K7+4C1347uF4R25 820+4C1547uF4R1OPEN4R268204C1610 44R278204C181044C171044K2VFD_MOUDLEVFD123456VDDDATAGNDBUSYCLKRESET4R3OPEN4K34R4OPEN4R2OPENJP1HEADER 5123454U6APL1117321INOUTGN DLED2 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D LDC DLDD V D P DC DPDVNBLDONMIRRMPMBMLPFMINMEVORFDCR FSINA TOPATONAINAIPVP ARFACBY PDINDIPFNPFNNVNAME VRXSDENSDATASCLKV33LCPLCNMNTRCEFETEPIV25V125TPHDFTLINKQ42N3906R41KC26104C16104R186K8R3033C23470pFL3FBSMTD31N4148Q22SB1132R2222KJP1HOP- 1200 PUH (JP24- 0.5MM)242322212019181716151413121110987654321TR-TR+FO-FO+PD(MONITOR)VCCVRGNDLD(DVD)LD(CD)VRGND(NC)PDGNDRFOUTCBADFEVCCVS(VCC)GND+C11347uFC22470pFR3122KR110C28820pFC43104D21N4148Q12SB1132C33104R1656KR70C42200pFC5120pFC21103R2310K+C3247uFJP3PH- 9A123456789R4333C7104C14104reserved504.25114.75121.5bypass14.250PLL010801162111NA0135S- CHIP0NA3.75PL L21Fr equency04148.541121.50101.25reserved127bypass06DEFAULTPLL15.5DEFAUL T14.754.501MULTI0S- CHIP114.7511128.251083.54.5NA94.500PLL30CLKSOURCE1CRSTALO SCDCLKINPUTVibratto- IIVibratto- II文件名称：文件编号：页次：审核：日期：主机型号：拟制：硬件版本：主板原理图2006-06CD31 MKII1/6LD1LA12LD6LA4LA18LA3LA17LA2LD0LA6LA7LA19LA14LA1LA5LA11LD5LD2LA10LOE#LA9LD3LD4LA8LA13LA15LA16WRLL#RESET#LD6LA 1LA18DB11TR2RFRPLA10DB10SPINDLELD7LA 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ETOUTSWHOMESWSDATAFEIHFMVSWTEI.CLOSETRACKCEISVREF15OPENSLEGNSBADDINSCSJSDEFCTSLDCSCLKSPI_DATASPI_CLKSPI_CSVFD_BUSYDAC_CSSCLSDADAC_DATAMUTEDAC_CLKIR_INRESET#RESET#SPDIF- OUTVCC33PLL33VVCC20VCC20VCC33VCC33VCC33VCC33PLL33VSVREF15VCC33VCC33VCC33VCC33VCC33VCC33VCC33VCC20V33_PL1V33_PL1RFV331VCC33VCC1VCC33C81104R604K7+C10910uFL9FBSMTC108104C50682R5133RB533X418273645R633KC76104R65OPENC91104R386K 8+C9747uFL8FBSMTR426K 8C68105C52153C101104C59OPENL6FBSMTU624C01A12345678S0S1S2GNDSDASCLWCVCCRB233X418273645C18OPENC51470pFRB8 33X418273645R4710KU54Mx16 SDRAM124657381012111391516171819352223242526142829303132333436373839404342444645474948505251534120212754VCCDQ0DQ1VSSQDQ2DQ3VCCQDQ4DQ5VSSQDQ6DQ7VCCQDQMLWECASRASCSA11A10A0A1A2A3VCCVSSA4A5A6A7A8A9NCCKECLKDQMHNCVCCQDQ8DQ9VSSQDQ10DQ11VCCQDQ12DQ13VSSQDQ14DQ15VSSBA0BA1VCCVSS+C10710uFC86104C64OPENR6733+C9647uFR731KC48153RB333X418273645R7633C4433pFX127MHz5184OUTN/CVCCGNDC104104C57473C77104+C9947uFR400C751000pFC17OPENC711000pFR6947KC66104R4920KR624K 7R46OPENC53104RB133X418273645C194700pFC60OPENRB433X418273645R61OPENR721KR50R714K7U3ES6629D1234567891 01 11 21 31 41 51 61 71 81 92 02 12 22 32 42 52 62 72 82 93 03 13 23 33 43 53 63 73 83 94 04 14 24 34 44 54 64 74 84 95 05 15 2535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410 510 610 710 810 911 011 111 211 311 411 511 611 711 811 912 012 112 212 312 412 512 612 712 812 913 013 113 213 313 413 513 613 713 813 914 014 114 214 314 414 514 614 714 814 915 015 115 215 315 415 515 6157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208VD33XINXOUTDCLKDMA0DMA1DMA2DMA3VS33VD33DMA4DMA5DMA6DMA7DMA8DMA9DMA10VS33VD33DMA11DCASDCS0DCS1DRAS0DBANK0/ DRAS1VSSVDDDBANK1/ DRAS2DCKE/DOE/TDMTSCDWEDB0DB1DB2VS33VD33DB3DB4DB5DB6DB7DB15DB14VS33VD33DB13DB12DB11DB10DB9DB8DSCKVS33VD33DQMLA21LA20LA19LA18LA17LA16VS33VD33LA15LA14LA13LA12LA11LA10LA9VSSVDDLA8LA7LA6LA5LA4LA3VS33VD33LA2LA1LA0LCS0LCS1LCS2VSSVDDLCS3LWRLLLOELD0LD1LD2LD3VS33VD33LD4LD5LD6LD7RSD/TDMDRRBCK/TDMCLKRWS/TDMFSVD33_PLLVS33_PLYUV1/VREFYUV3/COMPYUV4/RSETYUV7 /F DACYUV6/VDACVD33_DAVS33_DAYUV5/YDACYUV2/CDACYUV0/UDACT WS/SEL_PLL2TSD0/SEL_PLL0TSD1/SEL_PLL1VS33TSD2TSD3MCLKTBCKSPDIF/SEL_PLL3SPDIF INVD33VS33XSWBLCLKXSW BLXSLGXSIP2XSIP1XSFLAG0XSFLAG1XSFLAG2XSFLAG3VSSVDDXSTEXIXSTESTADXSSBADXSFEIAVSS_ADXSCEIXSTEIXSRFRPAVDD3_ADXSVREF21XSVREF09XSVREF15XSIREFAVDD3_DSXSIPINXSRF INXSRFIPXSDSSLVAVSS_DSAVSS_PLXSPDOFTR1XSFDOXSFTROPIAVDD3_PLXSPLLFTR1XSPLLFTR2XSVREF0XSAWRCAVSS_DAXSRFRPCTRXSTRAYAVDD3_DAXSSPINDLEXSFOCUSXSSLEGPXSSLEGNXSTRACKXSTESTDAXSFGINXSPHOISXCSJXSDATAXSCLKXSDFCTXSLDCXSSPDONVD33VS33XGPIO9XGPIO8XGPIO7XGPIO6XGPIO5XGPIO4EAUX03EAUX02EAUX01EAUX00VSSVDDAUX0AUX1AUX2/ HSYNCAUX3/ VSYNCAUX4AUX5AUX6AUX7RESETVS33R5068K+C9447uF+C9847uFC84104+C11110uFR533K 3C79104R553K 3C92104R5210KR63OPENC80104C55104C90104C112104C82104C6347pFR3533R416K 8C78104C4633pFR485K1R451K2+C10047uFC110104C102104C13105R584K7R3633+C10547uFC103104C49470pFC72104C47104C741000pFL12FBSMTC54104RB7 33X418273645C62104C731000pFR376K 8C89104C88104C69105R57OPENR563K 3R644K7C56104TP1LCS1R3433+C9547uFQ52N3904D41N4148C67104C4533pFR543K 3C204700pFC65682C70104+C10610uF