Pioneer-CX3116-cdm-sm 维修电路原理图.pdf

ORDER NO.PIONEER CORPORATION 4-1, Meguro 1-chome, Meguro-ku, Tokyo 153-8654, JapanPIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, BelgiumPIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936 PIONEER CORPORATION 2005 CRT3467 CD MECHANISM MODULE(G3) CX-3168 CX-3116 K-ZZU. APR. 2005 Printed in Japan X-3168 : TOYOTAX-3116 : FORD - This service manual describes the operation of the CD mechanism module incorporated in models listedin the table below. - When performing repairs use this manual together with the specific manual for model under repair. ModelService ManualCD Mechanism ModuleAVIC-XD1057ZF/UCAVIC-XD1557ZF/UCAVIC-XD1957ZF/UCCRT3458CXK7300DEH-MG2057ZF/XU/UCCRT3480CXK7300DEX-MG8157ZT/UCDEX-MG8057ZT/XU/UCCRT3486CXK7310DEH-MG8257ZT/UCCRT3487CXK7310 CONTENTS 1. CIRCUIT OVER VIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . 22. MECHANISM OVER VIEW . . . . . . . . . . . . . . . . . . . . . . 233. DISASSEMBLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354. HOW TO ASSEMBLE . . . . . . . . . . . . . . . . . . . . . . . . . . 45RadioFans.CN 收音机爱 好者资料库 CX-3168212341234CDFABE1. CIRCUIT OVER VIEWFig.1 UPD63763AGJ(X-3168),UPD63761AGJ(X-3116) block diagramA-FUPD63763AGJ,UPD63761AGJAudio outputSDRAM16MbitMicrocomputerDigital servoRF ampCD-ROM decoderEFMSignal processingBuilt-in SRAM (1M bit)Buffer memory controller (BMC)MP3/WMA decoderDACConcerning CD LSI, beside the core DSP, LSI which unifies DAC once used as peripheral circuit or RF amp is the mainstream, and UPD63763AGJ,UPD63761AGJ is a multifunction LSI which has a plenty of functions such as existing CD and replay CD-ROM storing MP3/WMA file by embedding CD-ROM decoder or MP3/WMA decoder.*X-3116 has built-in WMA decoder by each LSI function, but is not corresponded to its specification.RadioFans.CN 收音机爱 好者资料库 CX-3168356785678CDFABE1.1 PREAMP SECTION1.1.1 APC circuit (Automatic Power Control)Fig.2 APCPU unitCD core unitMDVRLD-LD+111310911131091000PCTF13890.1F15/3R32SB11322R4 x 22R7+-+-+-PDVREFREG 1.25VAPNLDSUPD63763AGJ,UPD63761AGJLD1431426R5K1K6R5K1K110K100K100K3PThe preamp section is processing pick-up output signal and generating signal to servo section, demodulator section and control section of the next stage. The signal from pick-up is I-V converted by photodetector-built-in preamp in the pick-up, then added by RF amp and created RF, FE, TE, TE empty cross signal. This preamp section is embedded in CD LSI UPD63763AGJ,UPD63761AGJ (IC201), and each section of it is explained below. Since the spec of this LSI is single power supply (+3.3V), reference voltage of this LSI and pick-up should be all REFO (1.65V). REFO is the output from REFOUT in the LSI through buffer amp, and its output comes from the number 133 pin of the LSI. All measurement is based on the REFO.NOTE: Never short-circuit REFO and GND.Since light output has large minus temperature characteristics when laser diode is operated under constant current, it is necessary to control current by monitor diode so that constant output is maintained. This is APC circuit. LD current is generated by measuring current between LD1 and V3 R3 and dividing the value by 7.5 , and its current value should be about 30mA. CX-3168412341234CDFABE1.1.3 Focus error amp1.1.4 RFOK circuit1.1.5 Tracking error ampFig.3 TEP5VERFE11FEF9119P6P1P10130112K160K129112K160K160K63K80K181K45R36K45R36K+-63K+-+-VREFTEOFF settingTE A/D+-+-+-+-60K20KInternal TEC139TEO138TE-140TE2141TEC47P68PCD core unitPU unitUPD63763AGJ,UPD63761AGJThe photodetector output (A+C), (B+D) comes from the number 91 pin as FE signal which is (A+C-B-D) through differential amp and then error amp. The low frequency of voltage FE is showed in the following formula.FE=(A+C-B-D) X 8.8k / 10k X 111k / 61k X 160k / 64k =(A+C-B-D) X 4The FE output generates 1.5Vpp of S curve based on REFO. The cut-off frequency of the amp in back stage is 14.6kHz.This circuit is signal expressing timing of focus-close and focus-close condition during playing, and output from the number 55 pin as RFOK signal output. During playing at focus-close, H is output as signal.Since RFOK signal holds a peak of DC level of RFAGCI at digital section in back stage and is converted and generated by certain threshold level, RFOK is H without a bit. Therefore, focus-close is also performed in disc mirror surface. This signal is supplied to a microcomputer via LPF as FOK signal and used for protection and switching gain of RF amp.The photodetector output E, F comes from the number 139 pin, taking (E-F) as TE signal through a differential amp and then an error amp. The low frequency of TE is showed in the following formula.TEO=(E-F) X 63k / 112k X 160k / 160k X 181k / 45.4k X 160k / 80k = (E-F) X 4.48TE output generates 1.15Vpp level TE waveform based on REFO. The cut-off frequency of the amp in back stage is 21.1kHz. CX-3168556785678CDFABE1.1.6 Tracking empty cross amp1.1.7 EFM circuit Fig.4 EFM1142K100K40K40KVDDVDD+-+-+-RFIUPD63763AGJ,UPD63761AGJEFM signal111EFM112ASYThe tracking empty cross signal (hereafter, TEC signal) is the signal amplifying TE signal for 4 times and used to find an empty cross point of tracking error. The purpose for finding the empty cross point is;1 To use for track count at carriage movement and track jump2 To use for detecting direction of lens movement at tracking close (used in a tracking brake circuit described later)The frequency range of TEC signal is 300 Hz - 20kHz, and voltage TEC=TE level X 4.That is, TEC level is 4.62V as calculated, and this level is over D range of an operation amp and so that the signal is clipped, but only empty cross point is used in CD LSI, so there is no problem.EFM circuit is the circuit for converting RF signal into 0 1 digital signal. AGCO signal output from the number 116 pin is AC-combined, input to the number 114 pin, and supplied to EFM circuit.Since RF vertical asymmetry occurred because of the lack of RF signal by a scratch or dirt on a disc, and quality variation of disc production is not deleted only by AC-combination, reference voltage ASY of EFM comparator is controlled, taking advantage of the fact that the occurring rate of 0 1 in EFM signal is 50%. In this way, the comparator level is always around the center of RFO signal. This reference voltage ASY is generated with passing EFM comparator output through LPF. EFM signal is output from the number 111 pin. CX-3168612341234CDFABE1.2 SERVO SECTION (UPD63763AGJ,UPD63761AGJ: IC 201)1) Focus servo systemFEAMPDIG.EQ125A+CB+DFDFO+FO-IC302BD7962FMLENSIC201 UPD63763AGJ,UPD63761AGJ1281011817FOCUS SEARCHTRIANGULAR WAVE GENERATORDACCONTROLA/DR21810KR311C2191000pF8R2KR31327KC302150P1011Fig.5 Focus servo block diagramThe servo section operates servo control such as equalizing of error signal, in-focus, track jump, carriage move, etc. DSP is section for signal processing and operates data decoding, error correction, interpolation processing, etc. FE, TE signal generated in preamp stage is A/D converted and outputs drive signal of focus, tracking, and carriage system via servo block. And EFM signal is decoded in the signal processing section and outputs audio signal after D/A convert via D/A converter finally. In addition, in this decoding process, error signal of a spindle servo is generated, and supplied to the spindle servo section, and outputs drive signal for the spindle. Each drive signal of focus, tracking, carriage and spindle is amplified by the driver IC BD7962FM (IC302) after that and supplied to each actuator and motor.The main equalizer of focus servo is made up of digital equalizer section. The fig 10 shows a block diagram of focus servo.In the focus servo system, it is necessary to bring a lens within in-focus range to focus-close. In order to do that, triangle wave of focus search voltage moves a lens up and down to find in-focus point. During that time, a spindle motor is kicked to maintain rotation at the fixed speed. The servo LSI monitors FE signal & RFOK signal, and operates focus-close automatically in appropriate point. The focus-close is performed when following 3 conditions are set;1 A lens is moving from away to near toward a disc.2 RFOK= H3 Just at the moment when FZC signal is once over the threshold of FZD register and latched to H again (the edge of FDZ). As the result, FE converges 0 (=REFO). CX-3168756785678CDFABEREFOFDRelative lens position toward a discNEARFARLevel of focusing timeMDREFOZoom-in of focusing point REFORFIFOKFEFZD threshold level FZD (internal signal)Usually, focus-close occurs at these points. XSI (focus is closed)Fig.6 Focus-close sequenceWhen the conditions described above are set and focus-close is performed, XSI terminal becomes H - L and after 40ms, the microcomputer starts to monitor RFOK signal through LPF.When RFOK signal is detected as L, the microcomputer takes a various action such as protection.Fig 11 shows a series of action concerning focus-close (this figure shows a case when focus-close is impossible).If pressing focus-close button in condition that a select of focus mode is display 01 in the test mode, it is possible to check S curve, search voltage and actual lens operation. CX-3168812341234CDFABEThe main equalizer of tracking servo is made up of digital equalizer section. A block diagram of tracking servo is showed in Fig 12.2) Tracking servo systema) Track jumpTEAMPDIG.EQ129FETDTO-TO+IC302BD7962FMLENSIC201 UPD63763AGJ,UPD63761AGJ1301031615JUMPPARAMETERSDACCONTROLA/Dt1t2GAIN NORMALTDKICKBRAKETECT. BRAKEEQUALIZERT. SERVOCLOSEDOPENNORMALGAIN UPOFFONFig.7 Tracking servo block diagramFig.8 Single track jumpFig.9-1 Multi-track jumpR21410KR312C2151500pF8R2KR31418KC301220P1312Track jump is performed automatically by the command of the microcomputer according to the auto-sequence function inside LSI. In this system, up to 100 tracks of multi-jump is prepared for using as track jump at the search time. In the test mode, 1, 4, 10, 32, 32 X 3 jump of it and carriage move can be checked by mode selection. For jumps up to 4 tracks, about half number of total jumps (e.g., about 2 tracks are set for 4 tracks) are set by microcomputer. The speed control (which counts the length of TEC interval and controls TD so as to keep a constant frequency) is conducted for any jump up to 5-100 tracks and a target number of total tracks is set by microcomputer. The established number of tracks is counted by using TEC signal. From the moment when the set number is counted, brake pulse is output for defined period of time, and a lens is stopped. In this way, it is possible to close tracking and continue normal play.In addition, gain up of a tracking servo in the brake circuit ON is performed for 50ms after stopping brake pulse in order to increase lead-in of servo during track jump. FF/REW operation in normal mode is carried out with executing a single jump continuously. The speed is varied according to place of destination and is about 10 or 20 times of normal mode.TDt1t2TECEQUALIZERT.BRAKESERVO50msGAIN UPNORMALONOFFOPENCLOSED CX-3168956785678CDFABEb) Brake circuitTECTZC (TEC becomes pulse) (Internal signal)MIRRMIRR is latched by the edge of TZC pulse.=SWITCHING PULSEEQUALIZER OUTPUT(SWITCHED)DRIVE DIRECTION(NOTES) The phase of equalizer output is written as the same as TEC phase.FORWARDLens moving forward (from inner side to outer side) Lens moving backwardTimeREVERSEFig.10 Tracking brake circuitSince lead-in of servo is weakened during set-up or track jump, stable lead-in to servo loop is performed, using a brake circuit. The brake circuit detects the direction of a lens and outputs only the drive signal of the cross direction toward its operation to slow the lens speed down and performs stable lead-in to the tracking servo. In addition, the direction for sliding a track is determined by TEC signal, MIRR signal and its phase relation.Fig.9-2 Multi-track jump(Speed control)TDTECEQUALIZERT.BRAKESERVOSD50ms CX-31681012341234CDFABECOMCOPIC302BD7962FMCARRIAGEMOTOR1920MR32127KR31939KC3064R7P33323) Carriage servo systemDIG.EQSDIC201 UPD63763AGJ,UPD63761AGJ 105KICK, BRAKEREGISTERSDACCONTROLFROMTRACK. EQDRIVE ON/OFF THRESHOL DCarriage is moved by these points.TRACKING DRIVE(LOW FREQUENCY)LENS POSITIONCRG DRIVE(INSIDE UPD63711GC)CRG MOTOR VOLTAGEFig.11 Carriage servo block diagramFig 16: Carriage servo block diagramFig.12 Carriage signal waveformThe carriage servo is input the output from low frequency number composite of tracking equalizer (position information of lens) to carriage equalizer, and after acquiring fixed gain, it outputs drive signal from LSI. The signal is impressed to carriage motor via driver IC.To be more precise, since it is necessary to move the entire pick-up to forward direction when lens off-set during playing reaches to certain level, the gain of equalizer is set to generate higher voltage than start-up voltage of carriage motor at that time. In addition, actual operation is set to fix a certain threshold for equalizer output inside servo LSI, and to output the drive voltage only when the level of equalizer output is over that fixed level. In that way, power consumption is reduced. Moreover, according to decentering of a disc, the level of equalizer output voltage may cross threshold level several times before the entire pick-up starts to move. At that time, output waveform of drive voltage from LSI is pulse state. CX-31681156785678CDFABE4) Spindle servo systemDSPBLOCKDIG.EQMDA3A1IC301BA6859AFPSPINDLEMOTORIC201 UPD63763AGJ,UPD63761AGJ1072046DACEFMSIGNALMSPEED ERROR SIGNALPHASE ERROR SIGNALR32218K2726R32033KC3070.01ECIC302BD7962FMECRSPCONTFG5A2192122Fig.13 Spindle servo block diagramThere are following modes for spindle servo.1 Simple FG servo:It is for maintaining the rotation of a disc to be in closer condition of regular rotation.The microcomputer monitors FG signal output pulse according to the rotation of a spindle motor and controls the drive voltage of the spindle motor.This is used in following situation.a) At set-up time, it is used during transition from power ON with focus-close to rough servo.b) It is used until recovering from out-of-focus during playing.2 Adaptation servo:It is CLV servo mode of normal operation.It takes a sample of WFCK/16 at EFM demodulation block to check whether frame synchronized signal and internal frame counter output agree, then generates signal showing agree or disagree. When this signal shows disagree 8 times continuously, it is considered as asynchronous and otherwise, it is considered as synchronous. This adaptation servo selects lead-in servo in asynchronous, and regular servo in synchronous automatically.3 Brake:It is a mode for stopping a spindle motor. The microcomputer monitors FG pulse and applies the brake fully to certain interval (speed) and decreases the brake level and stops it when the speed is under that.4 Stop:It is a mode used at the time of P