Marantz-CD6003-cd-sm 维修电路原理图.pdf

修理際、 必取扱説明書準備操作方法確認上作業行。Please use this service manual with referring to the user guide (D.F.U.) without fail.ServiceManualCD PlayerCD6003 /F N/K1SG/N1B/N1SGTABLE OF CONTENTSSECTION PAGE 1. TECHNICAL SPECIFICATIONS.1 2. SERVICE HINTS AND TOOLS .2 3. WARNING AND LASER SAFETY INSTRUCTIONS .3 4. TAKING THE DISC OUT OF EMERGENCY .4 5. SERVICE MODE .4 6. ALL CLEAR .8 7. ERROR MESSAGE .8 8. TROUBLESHOOTING .20 9. UPDATE MICROPROCESSOR SOFTWARE PROCEDURE .22 10. WIRING DIAGRAM .33 11. BLOCK DIAGRAM.35 12. SCHEMATIC DIAGRAM .37 13. PARTS LOCATION .43 14. EXPLODED VIEW AND PARTS LIST .53 15. MICROPROCESSOR AND IC DATA .57 16. ELECTRICAL PARTS LIST .65 17. ABOUT REPLACE THE MICROPROCESSOR WITH A NEW ONE .78CD6003Part no. 90M23DW855010First Issue 2009.06ecmCD6003RadioFans.CN 收音机爱 好者资料库MARANTZ DESIGN AND SERVICEUsing superior design and selected high grade components, MARANTZ company has created the ultimate in stereo sound.Only original MARANTZ parts can insure that your MARANTZ product will continue to perform to the specifications for which it is famous. Parts for your MARANTZ equipment are generally available to our National Marantz Subsidiary or Agent. ORDERING PARTS : Parts can be ordered either by mail or by Fax. In both cases, the correct part number has to be specified. The following information must be supplied to eliminate delays in processing your order : 1. Complete address 2. Complete part numbers and quantities required 3. Description of parts 4. Model number for which part is required 5. Way of shipment 6. Signature : any order form or Fax. must be signed, otherwise such part order will be considered as null and void.SHOCK, FIRE HAZARD SERVICE TEST : CAUTION : After servicing this appliance and prior to returning to customer, measure the resistance between either primary AC cord connector pins (with unit NOT connected to AC mains and its Power switch ON), and the face or Front Panel of product and controls and chassis bottom. Any resistance measurement less than 1 Megohms should cause unit to be repaired or corrected before AC power is applied, and verified before it is return to the user/customer. Ref. UL Standard No. 60065.In case of difficulties, do not hesitate to contact the Technical Department at above mentioned address. 080702MZNOTE ON SAFETY :Symbol Fire or electrical shock hazard. Only original parts should be used to replaced any part marked with symbol . Any other component substitution (other than original type), may increase risk of fire or electrical shock hazard.安全上注意：部品、安全上重要部品。必指定部品番号使用下。USAMARANTZ AMERICA, INC100 CORPORATE DRIVEMAHWAH, NEW JERSEY 07430USAEUROPE / TRADING D&M EUROPE B. V. P. O. BOX 8744, BUILDING SILVERPOINTBEEMDSTRAAT 11, 5653 MA EINDHOVENTHE NETHERLANDSPHONE : +31 - 40 - 2507844FAX : +31 - 40 - 2507860KOREAD&M SALES AND MARKETING KOREA LTD.CHUNG JIN B/D., #1001,53-5, WONHYORO 3 GA, YONGSAN-GU,SEOUL, 140-719, KOREAPHONE : +82 - 2 - 323 - 2155FAX : +82 - 2 - 323 - 2154CANADAD&M Canada Inc.5-505 APPLE CREEK BLVD. MARKHAM, ONTARIO L3R 5B1CANADAPHONE : 905 - 415 - 9292FAX : 905 - 475 - 4159JAPAND&M BUILDING, 2-1 NISSHIN-CHO,KAWASAKI-KU, KAWASAKI-SHI,KANAGAWA, 210-8569 JAPAND&M Holdings Inc.CHINAD&M SALES AND MARKETING SHANGHAI LTD.ROOM.808 SHANGHAI AIRPORT CITY TERMINAL NO.1600 NANJING (WEST) ROAD, SHANGHAI, CHINA. 200040TEL : 021 - 6248 - 5151FAX : 021 - 6248 - 4434RadioFans.CN 收音机爱 好者资料库11. TECHNICAL SPECIFICATIONSAudio characteristicsChannels .2 channelsFrequency response .2 Hz to 20 kHzDynamic range .100 dBSignal-to-noise ratio (A-weighted) . 110 dBChannel separation (1 kHz) . 110 dBHarmonic distortion (1 kHz) . 0.002%Wow & flutter .Precision of quartzAudio output .2.35 V rms, stereoHeadphone output (variable maximum) . 18 mW/32 ohmsDigital outputCoaxial output (pin jack).0.5 Vp-p, 75 ohmsOptical output (square optical connector) .-19 dBmOptical readout systemLaser.AlGaAs semiconductorWavelength . 780 nmSignal systemSampling frequency . 44.1 kHzQuantization .16-bit linear PCMPower supplyPower requirement .AC 230 V 50/60 Hz Power consumption .19 WStandby power consumption .0.3 W 规格 K version only 音频特性模拟输出 (载荷=10k Ref=1kHz)声道 .2声道频率响应 .4Hz到20kHz (Ref=0dB, 3dB)动态范围(使用 FLP-A20k 时) .90dB (Ref=-60dB)信噪比(使用 FLP-A20k 时) .90dB (Ref=0dB)全频失真(使用 FLP-A20k 时) .0.008% (Ref=0dB)晃抖度 .石英精度输出水平 .2.350.3V rms数字输出水平输出(同轴) .0.5V0.1Vp-p,75水平输出(光学) .-19 dBm 3 dBm光学读取系统激光 .AlGaAs半导体激光波长 .760 - 800nm信号系统采样频率 .44.1kHz量化 . 16位线性PCM电源电源要求 .交流220V 50Hz功耗 .19W待机电源消耗 . Input Port88P65DIS_OFF_LEDOHLDisplay Off LED On89DVCCST+3.3VDVCC-ST+3.3V90P6691DVSSGND-GND92P50/AN0KEY0AD-Front Key In 093P51/AN1KEY1AD-Front Key In 194P52/AN2KEY2AD-Front Key In 295P53/AN3/_ADTRGDETECTAD-2 times AC voltage input detect96P54/AN4AD97P55/AN5AD98P56/AN6MODEL_SEL0AD-Model Select099P57/AN7MODEL_SEL1AD-Model Select1100VREFHST+3.3V-ST+3.3V for AD59IC27 : CDCE913PWR1FEATURESAPPLICATIONSXin/CLK114XoutS0213S1/SDAVDD312S2/SCLVctr411Y1GND510GNDVDDOUT69Y278Y3VCXOXOLVCMOSLVCMOSLVCMOSPLLwithSSCLVCMOSDividerandOutputControl3EEPROMProgrammingandControlRegisterVctrCrystalorClockInputS2/S1/S0orSDA/SCLVDDGNDVDDOUTY1Y2Y3VDDOUTCDCE913CDCEL913SCAS849BJUNE 2007REVISED DECEMBER Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V OutputsFlexible Clock Driver2345 Member of Programmable Clock GeneratorThree User-Definable Control InputsFamilyS0/S1/S2, for example., SSC Selection,Frequency Switching, Output Enable, orCDCE913/CDCEL913: 1-PLL, 3 OutputsPower DownCDCE925/CDCEL925: 2-PLL, 5 OutputsGenerates Highly Accurate Clocks forCDCE937/CDCEL937: 3-PLL, 7 OutputsVideo, Audio, USB, IEEE1394, RFID,CDCE949/CDCEL949: 4-PLL, 9 OutputsBluetooth, WLAN, Ethernet, and GPSIn-System Programmability and EEPROMGenerates Common Clock FrequenciesSerial Programmable Volatile RegisterUsed With TI-DaVinci, OMAP, DSPsNonvolatile EEPROM to Store CustomerProgrammable SSC ModulationSettingEnables 0-PPM Clock GenerationFlexible Input Clocking Concept1.8-V Device Power SupplyExternal Crystal: 8 MHz to 32 MHzWide Temperature Range 40 C to 85 COn-Chip VCXO: Pull Range 150 ppmPackaged in TSSOPSingle-Ended LVCMOS up to 160 MHzDevelopment and Programming Kit for EasyFree Selectable Output Frequency up toPLL Design and Programming (TI Pro-Clock)230 MHzLow-Noise PLL CoreD-TV, STB, IP-STB, DVD-Player, DVD-Recorder,PLL Loop Filter Components IntegratedPrinterLow Period Jitter (Typical 50 ps)Separate Output Supply PinsCDCE913: 3.3 V and 2.5 VCDCEL913: 1.8 V1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.2DaVinci, OMAP, Pro-Clock are trademarks of Texas Instruments.3Bluetooth is a trademark of Bluetooth SIG.4I2C is a trademark of Philips Electronics.5Ethernet is a trademark of Xerox Corporattion.PRODUCTION DATA information is current as of publication date.Copyright 2007, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.CDCE913CDCEL913SCAS849BJUNE 2007REVISED DECEMBER 2007These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.The CDCE913 and CDCEL913 are modular PLL-based low-cost, high-performance, programmable clocksynthesizers, multipliers, and dividers. They generate up to 3 output clocks from a single input frequency. Eachoutput can be programmed in-system for any clock frequency up to 230 MHz, using the integrated configurablePLL.The CDCx913 has separate output supply pins, VDDOUT, which is 1.8 V for CDCEL913 and 2.5 V to 3.3 V forCDCE913.The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip loadcapacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF.Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an externalcontrol signal, that is, PWM signal.The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, BlueTooth,Ethernet, GPS) or interface (USB, IEEE1394, Memory Stick) clocks from e.g., a 27 MHz reference inputfrequency.The PLL supports SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking which isa common technique to reduce electro-magnetic interference (EMI).Based on the PLL frequency and the divider settings, the internal loop filter components are automaticallyadjusted to achieve high stability and optimized jitter transfer characteristic.The device supports non-volatile EEPROM programming for ease customization of the device to the application.It is preset to a factory default configuration (see the DEFAULT DEVICE CONFIGURATION section). It can bere-programmed to a different application configuration before PCB assembly, or re-programmed by in-systemprogramming. All device settings are programmable through SDA/SCL bus, a 2-wire serial interface.Three programmable control inputs, S0, S1 and S2, can be used to select different frequencies, or change SSCsetting for lowering EMI, or other control features like, outputs disable to low, outputs 3-state, power down, PLLbypass etc).The CDCx913 operates in a 1.8 V environment. It operates in a temperature range of 40 C to 85 C.Terminal Functions for CDCE913, CDCEL913TERMINALI/ODESCRIPTIONNAMEPIN TSSOP14Y1Y311, 9, 8OLVCMOS outputsXin/CLK1ICrystal oscillator input or LVCMOS clock Input (selectable via SDA/SCL bus)Xout14OCrystal oscillator output (leave open or pullup when not used)VCtrl4IVCXO control voltage (leave open or pullup when not used)VDD3Power1.8-V power supply for the deviceCDCEL913: 1.8-V supply for all outputsVDDOUT6, 7PowerCDCE913: 3.3-V or 2.5-V supply for all outputsGND5, 10GroundGroundS02IUser-programmable control input S0; LVCMOS inputs; internal pullup 500kSDA: bidirectional serial data input/output (default configuration), LVCMOS internalSDA/S113I/O or Ipullup; orS1: user-programmable control input; LVCMOS inputs; internal pullup 500kSCL: serial clock input LVCMOS (default configuration), internal pullup 500k orSCL/S212IS2: user-programmable control input; LVCMOS inputs; internal pullup 500k2Submit Documentation FeedbackCopyright 2007, Texas Instruments IncorporatedProduct Folder Link(s): CDCE913 CDCEL91360IC31 : TC94A70FGTC94A70FG/TC94A73MFG Single-chip CD-MP3 ProcessorHighlights Highly integrated solutionwith CD servo, RF amp, 1 Mbit SRAM, multi-bit DAconverter and audio DSPwith firmware libraryincluding MP3, WMA,ATRAC CD, AAC, graphicequalization, and popularsurround sound formats Pin compatibility betweenmonolithic TC94A70FGand system-in-package(SiP) TC94A73MFG with16 Mbit DRAM enables asingle hardware design tosupport standard andelectronic shock protection(ESP) CD playbackversions Macro commands simplifysoftware programming Programmable RAM andpin-compatible ROMsolutions enablecustomization andreduced time to market.DescriptionTC94A70FG and TC94A73MFG are highlyintegrated, high-performance CD-MP3solutions that enable playback of CD andmultiple compressed audio formats from asingle chip. Featuring high-quality audiooutput in I2S, S/PDIF or analog stereoformats, the TC94A70FG integrates an RFamplifier, CD servo, audio DSP, 1 MbitSRAM, and a multi-bit DA converter in aCMOS monolithic IC. To the TC94A70FGfeature set, the TC94A73MFG addselectronic shock protection (ESP) withDSP firmware and 16 Mbit DRAM in anSiP solution. TC94A70FG andTC94A73MFG are available in standardROM versions or can also be customizedto specific customer requirements usingan extensive and growing DSP firmwarelibrary including MP3, WMA, ATRAC CD,AAC, graphic equalization and popularsurround sound formats. Pin compatibilitybetween the monolithic TC94A70FG andthe SiP TC94A73MFG minimizes theProduct BriefTC94A70FG/TC94A73MFGSingle-chip CD-MP3 Processor1engineering investment needed to upgradeTC94A70FG CD playback designs with ESP.New product design is further aided byprogrammable RAM and macro commandsthat simplify CD mechanism playback andcompressed audio tag and file management.High integration, software customization, andpin-compatible packages make TC94A70FGand TC94A73MFG ideal for compressedaudio CD players where low cost, featureflexibility and time to market are keyselection criteria. Supported Product Families TC94A70FG-002:MP3, WMA9 and ATRAC CD DSPfirmware TC94A70FG-005:MP3, WMA9, ATRAC CD and AAC DSPfirmware TC94A73MFG-201:MP3, WMA9 and ESP DSP firmware TC94A73MFG-202:MP3, WMA9, ATRAC CD, AAC and ESPDSP firmwareCDRFINCDRFAmpAudioDACAnalogPostFilterServoADCCDPDSP24-BitDSP1 MbitSRAMServoProcessorServoDACPeripheralI/FPLL/VCO16 MbitDRAMAudioOut3.3V1.5VSiPTC94A73MFGOnlyBlock Diagramwww.T TC94A70FG 3/27 05/09/16Pin description (top view) LPFNTMAXTMAXSPDoPVDD3AWRCVSSVDD1LRCKi(Pi6)BCKi(Pi5)AiN(Pi4)LRCK(Po9)BCK(Po8)AoUT1(Po7)DoUT(Po6)MSGPINZDETSFSYIPFSBOKSBSYVDDT3VSSPio375747372717069686766656463626160595857565554535251LPFo7650Pio2PVREF7749Pio1VCoF7848Pio0PVSS37947AoUT2(Po5)SLCo8046AoUT3(Po4)RFi8145IRQRFRPi8244TESTRFEQo8343/CCEVRo8442BUCK(CLK)RESiN8541BUS3(Si)VMDiR8640BUS2(So)TESTR8739BUS1AGCi8838BUS0RFo8937/RSTRVDD39036SRAMSTBLDo9135VDDM1MDi9234VDD1RVSS39333VSSFNi29432VDDT3FNi19531DVSS3FPi29630LoFPi19729DVRTPi9828DVDD3TNPC9927RoTNi10026DVSS312345678910111213141516171819202122232425AVSS3RFZiRFRPSBAD/RFDCFEiTEiTEZiAVDD3FooTRoVREFFMoDMoVSSP3VCOiVDDP3VDD1VSSFGiNio0(/HSo)io1(/UHSo)XVSS3XiXoXVDD3Zipang1chip CDMP3TC94A70FG TC94A70FG 4/27 05/09/161. Pin Descriptions Pin No. Symbol I/O Description Default Remarks 1 AVSS3 Grounding pin for 3.3V CD analog circuits. 2 RFZi I 3AI/FInput pin for RF ripple zero-cross signal. I Connect to RFRP by 0.033uF 3 RFRP O 3AI/FRF ripple signal output pin. O 4 SBAD/RFDC O 3AI/FSub beam addition signal or RFDC (Hologram PUH RF peak detection signal) signal output pin O 5 FEi O 3AI/FFocus error signal input pin. O 6 TEi O 3AI/FTracking error signal input pin. O Monitor pin for the signal. 7 TEZi I 3AI/FTracking error signal zero-cross input pin. I Connect to TEI by 0.033uF8 AVDD3 Power supply pin for 3.3 V CD analog circuits. 9 Foo O 3AI/FFocus servo equalizer output pin. O 10 TRo O 3AI/FTracking servo equalizer output pin. O Built-in series resister 3.3k 11 VREF Reference voltage pin for analog circuits(1.65V) Connect to VRO and PVREF. Connect 0.1uF 12 FMo O 3AI/FFeed servo equalizer output pin. O 13 DMo O 3AI/FDisc servo equalizer output pin O Built-in series resister 3.3k 3-state output (AVDD3,AVSS3,VREF) 14 VSSP3 Grounding pin for 3.3V DSP VCO circuits. 15 VCOi I 3AI/FDSP VCO control voltage inputr pin. I 16 VDDP3 Power supply pin for 3.3V DSP VCO circuit. 17 VDD1 Power supply pin for 1.5V digital circuit 18 VSS Grounding pin for 1.5V digital circuit. 19 FGiN I 3I/F FG signal input pin for CAV. CLV: L, CAV: FG input I