JVC-XVM50BK-cd-sup 维修电路原理图.pdf

SERVICE MANUALCOPYRIGHT 2002 VICTOR COMPANY OF JAPAN, LTD.No.A0008B2002/11XV-M50BKDVD VIDEO PLAYERA0008B200211XV-M50BKTABLE OF CONTENTS1Description of major ICs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Block diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Area SuffixJ - U.S.A.C - CanadaBecause service manual XV-M50BK (Issue No.A0008)which has already been issued contains some mistakes,the following pages are modified in this service manual. *Description of major ICs*Block diagramsRefer to the service manual XV-M50BK (Issue No. A0008)which has already been issued for other pages. SupplementRadioFans.CN 收音机爱 好者资料库XV-M50BK2SECTION 1Description of major ICs1.1 AK93C65AF-X (IC403) : EEPROM Pin layout Block diagram Pin functionNOTE : The pull-up resistor of the PE pin is about 2.5Mohm (VCC=5V)Pin no.SymbolFunction1PE Program enable (With built-in pull-up resistor)2VCCPower supply3CSChip selection4SKCereal clock input5DICereal data input6DOCereal data output7GNDGround8NCNo connectionRadioFans.CN 收音机爱 好者资料库XV-M50BK31.2 AN8702FH(IC101):Frontend processor Pin layout Pin functionPin No.SymbolI/ODescription1PC1IInput for Laser current monitor2PC01OLaser power control output for DVD3PC2IPhoto detector fo CD4PC02OLaser power control output for CD5TGBALITangential phase balance control terminal6TBALITracking balance control terminal7FBALIFocus balance control ter8POFLTOTrack detection threshold level terminal9DTRDIData slice part data read signal input terminal (For RAM)10IDGTIData slice part address part gate signal input terminal (For RAM)11STANDBYIStandby mode control terminal12SENISEN(Serial data input terminal)13SCKISCK(Serial data input terminal)14STDIISTDI(Serial data input terminal)15RSELIDVD and CD selection16JLINEIJ-line setting output (FEP)17TENITracking error output amplifier reversing input terminal 18TEOUTOTracking error signal output terminal19ASNIOff set adjustment terminal for DRC20ASOUTOAll added signal output terminal21FENIFocus error output amplifier reversing input terminal22FEOUTOFocus error signal output terminal23VSS-Connect to GND24TGOTangential phase error signal output terminal25VDD-Power supply terminal 3V26GND2-Connect to GND27VREF2OVREF2 voltage output terminal28VCC2-Power supply terminal 5V29VHALFOVHALF voltage output terminal30DFLTONOFilter amplifier reversing output terminal31DFLTOPOFilter amplifier output terminal32DSFLTOConnected capacitor terminal for filter output33GND3-Connect to GND34RFDIFOORF operation output terminal35RFOUTORF output terminal36VCC3-Power supply terminal 5V37RFCIFilter for RF amplifierXV-M50BK438DCRFOAll addition amplifier capacitor terminal39OFTROOFTR output teminalr40BDOOBDO output terminal41RFENVORF envelope output terminal42BTTOMOBottom envelope detection filter terminal43PEAKOPeak envelope detection filter terminal44AGCGOAGC amplifier gain control teminalr45AGCOOAGC amplifier level control terminal46TESTSGITEST signal input terminal47RFINPIRF signal positive input terminal48RFINNIRF signal negative input terminal49VIN5IRF input of external division into 4 terminal for CD50VIN6IRF input of external division into 4 terminal for CD51VIN7IRF input of external division into 4 terminal for CD52VIN8IRF input of external division into 4 terminal for CD53VIN9IRF input of external division into 2 terminal for DVD54VIN10IRF input of external division into 2 terminal for DVD55VCC1-Power supply terminal 5V56VREF1OVREF1 voltage output terminal57VIN1IExternal division into four (DVD/CD) RF input terminal158VIN2IExternal division into four (DVD/CD) RF input terminal259VIN3IExternal division into four (DVD/CD) RF input terminal360VIN4IExternal division into four (DVD/CD) RF input terminal461GND1-Connect to GND62VIN11I3 beem sub input terminal for CD63VIN12I3 beem sub input terminal for CD64HDTYPEIHD type switchingPin No.SymbolI/ODescriptionXV-M50BK51.3 HY57V161610DTC8(IC504,IC505) : 16MB SDRAM Block diagram Pin functionPin No.SymbolDescription1VCCPower supply2,3DQ0,1Data input/output4VSSConnect to GND5,6DQ2,3Data input/output7VDDPower supply8,9DQ4,5Data input/output10VSSConnect to GND11,12DQ6,7Data input/output13VCCPower supply14LDQMLower DQ mask enable15WEWrite enable16CASColumn address strobe17RASRow address strobe18CSChip enable19,20A11,10Address inputs2124A03Address inputs25VCCPower supply26VSSConnect to GND2732A49Address inputs33NCNon connect34CKEClock enable35CLKSystem clock input36UDQMUpper DQ mask enable37NCNon connect38VCCPower supply39,40DQ8,9Data input/output41VSSConnect to GND42,43DQ10,11Data input/output44VDDPower supply45,46DQ12,13Data input/output47VSSConnect to GND48,49DQ14,15Data input/output50VSSConnect to GNDXV-M50BK61.4 M35500AFP(IC802) : FL Driver Pin layout Pin functionPin No.SymbolI/ODescription1VDD-Power supply terminal2XOUTOThe short-circuit is made and the capacitor is connected with XIN on the outside3VSS-Connect to ground4XINIThe short-circuit is made and the capacitor is connected with XOUT on the outside5RESETIReset input L:Reset611AIN50IKey control signal input12CSIChip select input L:The serial transfer is possible13SINISerial data input14SOUTOSerial data output15SCLKIClock input of serial transfer16,17VEE-The voltage supplied to the pull down resistance is impressed1820DISC31 INDOIndicator control signal output of disc indicator 1321,22NC-Not use23297G1GOFL Grid control signal output3043S14S1OFL Segment control signal output44VDD-Power supply terminalXV-M50BK71.5 M56788FP-W (IC271) : Traverse mechanism driver Terminal Layout Block diagramXV-M50BK81.6 MN101C49GGJ1(IC701): System controller Terminal layout PinfunctionPin No.SymbolI/OFunction1GND-Connect to ground2NC-No connect3NC-No connect4NC-No connect5NTSELINTSC/PAL selection 6POWER SWIPower switch detect terminal7SHUT1-Connect to VDD8KEY1-5-Connect to VDD9KEY6-10-Connect to VDD10VREF+IReference voltage11VDDIPower supply12OSC2OExternal terminal for connected oscirator13OSC1IExternal terminal for connected oscirator14VSS-Connect to ground15XI-Connect to ground 16XO-No connect17MMOD-Connect to ground18DADATAI/OData bus for DAC 19DACSOOSerial bus output for DAC20DACKI/OClock for DAC21S2UDTOCommunication between unit microcomputers DATA output22U2SDTICommunication between unit microcomputers DATA output23SCLKI/OSerial clock bus24BUSYI/OBusy bus25CPURSTOUnit microcomputer reset26REQICommnication between unit microcomputers REQ27REMOIRemote control interrruption28-Non connect29-Non connect30-Connect to ground31-Connect to ground32-Connect to ground33RESETIDVD reset34-No connect35-No connect36VCD-No connect37OSDCK-No connect38NT-No connect39FS2-No connectXV-M50BK940CHREQIChanger commnication REQUEST41CHSTOChanger commnication STROBE42CHDATAOChanger commnication DATA I/O43-No connect44CHCKIChannel clock45FLDATAOOSerial data output46FLDATAIISerial data input47FLCKOClock output of serial transfer48FLCSOChip select output49FLRSTOReset output50EEDOOData output to EEPROM51EEDIIData input from EEPROM52EECKOClock signal output to EEPROM53EECSOChip select output to EEPROM54VS1OFanction SW control55VS3OFanction SW control 56DMUT1-No connect57DMUT2-No connect58PDB2-No connect59PDB1-No connect60DEMP2-No connect61DEMP1-No connect62DENA-No connect63KARAOKEOKARAOKE Mode switching terminal64POWER ONOPower on control output65VS2-No connect66-No connect67-No connect68-No connect69-No connect70-No connect71-No connect72-No connect73-No connect74-No connect75-No connect76-No connect77AVCIIAV compulink signal input78AVCOOAV compulink signal output79RGBORGB select control signal output80STDINDOStandby LED control signal output81-No connect82-No connect83-No connect84-No connect85-No connect86CS4-No connect87MA-No connectPin No.SymbolI/OFunctionXV-M50BK1088MB-No connect89M1M3-No connect90MD-No connect91MC-No connect92GAIN2-No connect93GAIN1-No connect94HPMUT-No connect95DAVSS-No connect96LMUTE-No connect97CMUTE-No connect98SMUTE-No connect99MUTEOMuting control signal output100DAVDD-Power supply terminalPin No.SymbolI/OFunctionXV-M50BK111.7 MN102L62GGP (IC401) : Unit CPUPinNo.SymbolI/OFunction1WAITIMicon wait signal input2REORead enable3SPMUTEOSpindle muting output to IC2514WENOWrite enable5CS0-Not use6CS1OChip select for ODC7CS2OChip select for ZIVA8CS3OChip select for outer ROM9DRVMUTEODriver mute10SPKICK-Non connect11LSIRSTOLSI reset12WORDIBus selection input13A0OAddress bus 0 for CPU14A1OAddress bus 1 for CPU15A2OAddress bus 2 for CPU16A3OAddress bus 3 for CPU17VDD-Power supply18SYSCLK-Non connect19VSS-Ground20XI-Not use (Connect to vss)21XO-Non connect22VDD-Power supply23OSCIIClock signal input(13.5MHz)24OSCOOClock signal output(13.5MHz)25MODEICPU Mode selection input26A4OAddress bus 4 for CPU27A5OAddress bus 5 for CPU28A6OAddress bus 6 for CPU29A7OAddress bus 7 for CPU30A8OAddress bus 8 for CPU31A9OAddress bus 9 for CPU32A10OAddress bus 10 for CPU33A11OAddress bus 11 for CPU34VDD-Power supply35A12OAddress bus 12 for CPU36A13OAddress bus 13 for CPU37A14OAddress bus 14 for CPU38A15OAddress bus 15 for CPU39A16OAddress bus 16 for CPU40A17OAddress bus 17 for CPU41A18OAddress bus 18 for CPU42A19OAddress bus 19 for CPU43VSS-Ground44A20OAddress bus 20 for CPU45TXSELOTX Select46HAGUPOConnect to pick-up47CD/DVDICD/DVD Detect signal48ADPDOPower down control signal to IC51149HMFONOHFM Control output to IC10250TRVSWIDetection switch of traverse inside51FGINIFocus gain input52TRS53ADSCENOServo DSC serial I/F chip select54VDD-Power supply55FEPENOSerial enable signal for FEP56SLEEPOStandby signal for FEP57BUSYICommunication busy58REQOCommunication request59CIRCENOCIRC serial I/F chip select60HSSEEK61VSS-Ground62EPCSOEEPROM chip select63EPSKOEEPROM clock64EPDIIEEPROM data input65EPDOOEEPROM data output66VDD-Power supply67SCLKOOCommunication clock68S2UDTICommunication input data69U2SDTOCommunication output data70CPSCKOClock for ADSC serial71SDINIADSC serial data input72SDOUTOADSC serial data output73-INot use (Pull up)74-INot use (Pull up)75NMIINMI Terminal76ADSCIRQIInterrupt input of ADSC77ODCIRQIInterrupt input of ODC78DECIRQIInterrupt input of ZIVA79WAKEUP-Connect to ground80ODCIRQ2IInterruption of system control81ADSEPIAddress data selection input82RSTIReset input83VDD-Power supply84TEST1ITest signal 1 input85TEST2ITest signal 2 input86TEST3ITest signal 3 input87TEST4ITest signal 4 input88TEST5ITest signal 5 input89TEST6ITest signal 6 input90TEST7ITest signal 7 input91TEST8ITest signal 8 input92VSS-Ground93D0I/OData bus 0 of CPU94D1I/OData bus 1 of CPU95D2I/OData bus 2 of CPU96D3I/OData bus 3 of CPU97D4I/OData bus 4 of CPU98D5I/OData bus 5 of CPU99D6I/OData bus 6 of CPU100D7I/OData bus 7 of CPUPinNo.SymbolI/OFunctionXV-M50BK121.8 MN103S13BDA(IC301):Optical disc controller Pin layout Block diagramXV-M50BK13 Pin functionPinNo.SymbolI/ODescription1HDD15I/OATAPI Data2HDD0I/OATAPI Data3HDD14I/OATAPI Data4VDD-Power supply 3V5HDD1I/OATAPI Data6HDD13I/OATAPI Data7HDD2I/OATAPI Data8VSS-Connect to GND9HDD12I/OATAPI Data10VDD-Power supply 2.7V11HDD3I/OATAPI Data12HDD11I/OATAPI Data13HDD4I/OATAPI Data14HDD10I/OATAPI Data15VDD-Power supply 3V16HDD5I/OATAPI Data17HDD9I/OATAPI Data18VSS-Connect to GND19HDD6I/OATAPI Data20HDD8I/OATAPI Data21HDD7I/OATAPI Data22VDDH23NRESETIATAPI Reset input24MASTERI/OATAPI Master/slave select25NINT0OInterruption of system control 026NINT1OInterruption of system control 127WAITDOCOWait control of system control28NMRSTOReset of system control (Connect to TP302)29DASPSTISetting of initial value of DASP signal30VDD-Power supply 3V31OSCO2ONon connect32OSCI2INon connect33UATASELIConnect to VSS34VSS-Connect to GND35PVSSDRAMConnect to VSS36PVDDDRAMConnect to VDD(2.7V)37CPUADR17ISystem control address38CPUADR16ISystem control address39VSS-Connect to GND40CPUADR15ISystem control address41CPUADR14ISystem control address42CPUADR13ISystem control address43CPUADR12ISystem control address44VDD-Power supply 2.7V45CPUADR11ISystem control address46CPUADR10ISystem control address47CPUADR9ISystem control address48CPUADR8ISystem control addressXV-M50BK1449CPUADR7ISystem control address50CPUADR6ISystem control address51CPUADR5ISystem control address52CPUADR4ISystem control address53CPUADR3ISystem control address54CPUADR2ISystem control address55CPUADR1ISystem control address56VSS-Connect to GND57CPUADR0ISystem control address58NCSISystem control chip select59NWRIWriting system control60NRDIReading system control61VDD-Power supply 3V62CPUDT7I/OSystem control data63CPUDT6I/OSystem control data64PVPPDRAMOConnect to VSS65PTESTDRAMIConnect to VSS66PVDDDRAMConnect to VDD(2.7V)67PVSSDRAMConnect to VSS68CPUDT5I/OSystem control data69CPUDT4I/OSystem control data70CPUDT3I/OSystem control data71VSS-Connect to GND72CPUDT2I/OSystem control data73CPUDT1I/OSystem control data74CPUDT0I/OSystem control data75CLKOUT1OClock signal output (16.9/11.2/8.45MHz)76VDD-Power supply 3V77TEHLDOMirror gate (Connect to TP141)78DTRDOData frequency control switch (Connect to TP304)79IDGTOCAPA switch80BDOIRF Dropout/BCA data81CPDET2IOuter capacity detection82CPDET1IInner capacity detection83VSS-Connect to GND84MMODIConnect to VSS85NRSTISystem reset86VDD-Power supply 3V87CLKOUT2OClock 16.9MHz88SBCK/PLLOKOFlame mark detection89IDOHOLDOID gate for tracking holding90JMPINHOJump prohibition91LGOLand/group switch92NTRONITracking ON93DACDATAOSerial data output (Connect to TP148)94DACLRCKOIdentification signal of L and R (Connect to TP149)95DACCLKIClock for serial data output96IPFLAGIInput of IP flagPinNo.SymbolI/ODescriptionXV-M50BK1597BLKCKISub code/block/input clock98LRCKIIdentification signal of L and R (Connect to VSS)99VSS-Connect to GND100OSCI1IOscillation input terminal 16.9MHz101OSCO1OOscillation output terminal 16.9MHz102VDD-Power supply 3V103PVSS-Connect to GND104PVDD-Power supply 3V105P1I/OTerminal master polarity switch input106P0I/OCIRC-RAM,OVER/UNDER Interruption107VSS-Connect to GND108SBCKOClock output for sub code,serial input109SUBCISub code,serial input110NCLDCKISub code,flame clock input111CHCK40IClock is read to D112DAT3IAT30 (Output of division frequency from ADSC)113DAT2IData is read from disc (Going side by side output from ADSC)114DAT1IData is read from disc (Going side by side output from ADSC)115DAT0IData is read from disc (Going side by side output from ADSC)116VDD-Data is read from disc (Going side by side output from ADSC)117SCLOCKI/OPower supply 3V118SDATAI/ODebug serial clock (270 ohm pull up)119MONI3ODebug serial data (270 ohm pull up)120MONI2OInternal good title monitor (Connect to TP150)121MONI1OInternal good title monitor (Connect to TP151)122MONI0OInternal good title monitor (Connect to TP152)123VSS-Internal good title monitor (Connect to TP153)124NEJECTIConnect to GNDEject detection125VDD-Power supply 2.7V126NTRYCLINon connect (Tray close detection)127NDASPI/OATAPI drive active / slave connect I/O128NCS3FXINon connect (ATAPI host chip select)129NCS1FX