HarmanKardon-AVR2550-avr-sm维修电路原理图.pdf

AVR 2550 Audio/VideoReceiverService ManualAVR 2550Power for the Digital RevolutionRadioFans.CN 收音机爱 好者资料库TECHNICAL SPECIFICATIONSTechnical SpecificationsAudio SectionStereo Mode Continuous Average Power (FTC)50 Watts per channel, 20Hz20kHz, 0.07% THD, both channels driven into 8 ohmsFive-Channel Surround Modes Power Per Individual ChannelFront L&R channels:40 Watts per channel, 0.07% THD, 20Hz20kHz into 8 ohmsCenter channel:40 Watts, 0.07% THD, 20Hz20kHz into 8 ohmsSurround channels:40 Watts per channel, 0.07% THD, 20Hz20kHz into 8 ohmsInput Sensitivity/Impedance Linear (High Level)200mV/47kohmsSignal-to-Noise Ratio (IHF-A)95dBSurround System Adjacent Channel Separation Analog Decoding 40dB (Pro Logic, etc.) Dolby Digital (AC-3) 55dB DTS55dBFrequency Response 1W (+0dB, 3dB)10Hz100kHzHigh Instantaneous Current Capability (HCC)25 AmpsTransient Intermodulation Distortion (TIM)UnmeasurableRise Time16secSlew Rate40V/secFM Tuner SectionFrequency Range87.5108MHzUsable SensitivityIHF 1.3 V/13.2dBfSignal-to-Noise RatioMono/Stereo: 70/65dB (DIN)DistortionMono/Stereo: 0.15/0.3%Stereo Separation35dB 1kHzSelectivity300kHz: 65dBImage Rejection80dBIF Rejection90dBAM Tuner SectionFrequency Range5221620kHzSignal-to-Noise Ratio45dBUsable SensitivityLoop: 500VDistortion1kHz, 50% Mod: 0.8%Selectivity9kHz: 30dBVideo SectionVideo FormatPAL/NTSCInput Level/Impedance1Vp-p/75 ohmsOutput Level/Impedance 1Vp-p/75 ohmsVideo Frequency Response10Hz8MHz (3dB)GeneralPower RequirementAC 220-240V/50HzPower Consumption72W idle, 580W maximum (2 channels driven)Dimensions (Max)Width440mm Height166mm Depth365mmWeight10.6 kgDepth measurement includes knobs, buttons and terminal connections.Height measurement includes feet and chassis.All features and specifications are subject to change without notice.Harman Kardon is a registered trademark, and Power for the digital revolution is atrademark, of Harman International Industries, Inc.*Manufactured under license from Dolby Laboratories.“Dolby”,“Pro Logic”, and the Double-D symbol are trademarks of Dolby Laboratories, Inc.Confidential Unpublished Works. 19921999 Dolby Laboratories, Inc.All rights reserved.“DTS” and “DTS Digital Surround” are registered trademarks of Digital Theater Systems, Inc. UltraStereo is a trademark of UltraStereo Corp.VMAx is a trademark of Harman International Industries, Inc., and is an implementation of Cooper Bauck Transaural Stereo under patent license.Logic 7 is a registered trademark of Lexicon, Inc.Crystal is a registered trademark of Cirrus Logic Corp.RadioFans.CN 收音机爱 好者资料库48TROUBLESHOOTING GUIDETROUBLESHOOTINGSYMPTOMCAUSESOLUTIONUnit does not function when Main No AC Power Make certain AC power cord is plugged into a live outletPower Switch is pushed Check to see whether outlet is switch-controlledDisplay lights, but no sound Intermittent input connections Make certain that all input and speaker connections are secureor picture Mute is on Press Mute button Volume control is down Turn up volume controlUnit turns on, but front-panel Display brightness is turned off Follow the instructions in the Display Brightness section display does not light upon page 30 so that the display is set to VFD FULLNo sound from any speaker; Amplifier is in protection mode Check speaker wire connections for shorts at receiver and light around power switch is reddue to possible shortspeaker ends Amplifier is in protection mode Contact your local Harman Kardon service center, which you candue to internal problemslocate by visiting our Web site at No sound from surround or Incorrect surround mode Select a mode other than Stereo or Dolby 3 Stereocenter speakers Input is monaural There is no surround information from mono sources Incorrect configuration Check speaker mode configuratioin Stereo or Mono program material The surround decoder may not create center- or rear-channel information from nonencoded programsUnit does not respond to Weak batteries in remote Change remote batteriesremote commands Wrong device selected Press the AVR selector Remote sensor is obscured Make certain front-panel sensor is visible to remoteor connect remote sensorIntermittent buzzing in tuner Local interference Move unit or antenna away from computers, fluorescent lights, motors or other electrical appliancesLetters flash in the channel indicator Digital audio feed paused Resume play for DVDdisplay and digital audio stops Check that Digital Input is selectedAMPLIFIER SECTION BIAS ADJUSTMENTCUP11517X (MAIN PCB)Measurement condition. No input signal or volume position is minimum.Standard value. Ideal current = 48mA ( 5%). Ideal DC Voltage = 21.12mV ( 5%)DC VOLTMETER.Connect to CN61, CN62, CN63, CN64, CN65NO.ChannelAdjust forAdjustment1Front Left21.12mV (5%)VR61CN61VR612Front Right21.12mV (5%)21.12mV (5%)21.12mV (5%)21.12mV (5%)VR62CN62VR623CenterVR63CN63VR634Surround LeftVR64CN64VR645Surround RightVR65VR65CN65TRANSISTOR, REGULATOR IC BLOCK DIAGRAMTO-92M1. Emitter2. Collector3. Base1. Emitter2. Collector3. BaseKTC2874BKRA107M2SA1360OKTD600KGKTD1302TKTC3200GRKTA1271YKTA1268GRKTC3198YKSC2785YKRC107M2SC3423O1. Emitter2. Collector3. BaseTO-126TO-921231231231. Base2. Collector3. EmitterKSA614YTO-2201231. INPUT2. GND3. OUTPUTMC7815C MC7805CTO-2201231. GND2. INPUT3. OUTPUTMCNJM7905 MC7915CTO-2201231. Base2. Collector3. Emitter2SB1647 2SD2560 KTA1024Y KSC2316Y1. Emitter2. Collector3. BaseTO-3PTO-92L1231 2 31dBVRlatch8dBVRlatch1dBVRlatch8dBVRlatch3 to 7decoder4 to 13decoder1dBVRlatchShift register (32BIT)Strobe generatecircuitLevel shift circuit8dBVRlatch23L- OUTANCVSSVDDTESTL- INA45L- A- GNDAL- OUTB6L- INB78L- A- GNDBL- OUTC9L- INC1012CS1GND13CK14L- A- GNDC113L- OUTAL- INA45L- A- GNDAL- OUTBSame as L- chCircuit6L- INB78L- A- GNDBL- OUTC9L- INC1012CS1GND13CK14L- A- GNDC1112827TC9482F (ELECTRONIC VOLUME/INPUT) : IC31TC9482F (ELECTRONIC VOLUME/INPUT) : IC31GND 1TC9215AFOFF 23S10S11S12S20S21S41S40S42S34S32S31S30 VssDD456716 V15141312111089TC9215AF (TONE CONTROL : IC80)BLOCK DIAGRAMLEVEL SHIFTER212341562783123415627831345678910142811121327262524232221201918171615LATCH CIRCUIT SHIFT REGISTER LEVEL SHIFTERLATCH CIRCUIT L-SR-SVssGNDVDDL-SL-SL-SL-COML-SL-SL-COML-SL-SL-COMSTR-SR-SR-SR-COMR-SR-SR-COMR-SR-SR-COMDATACKLEVEL SHIFTER212314562783123145627831345678910142811121327262524232221201918171615LATCH CIRCUIT SHIFT REGISTER LEVEL SHIFTERLATCH CIRCUIT L-S R-SVssGNDVDDL-S L-S L-COML-SL-SL-SL-COML-SL-SL-COMSTR-SR-SR-COMR-SR-SR-SR-COMR-SR-SR-COMDATACKTC9164AF (FUNCTION/INPUT) : IC22BLOCK DIAGRAMTC9163AF (FUNCTION/INPUT) : IC20BLOCK DIAGRAMLEVEL SHIFTER212134256374121342563741345678910142811121327262524232221201918171615LATCH CIRCUIT SHIFT REGISTER LEVEL SHIFTERLATCH CIRCUIT L-SR-SVssGNDVDDL-SL-COML-SL-SL-COML-SL-SL-COML-SL-COMSTR-SR-COMR-SR-SR-COMR-SR-SR-COMR-SR-COMDATACKLEVEL SHIFTER212134256374121342563741345678910142811121327262524232221201918171615LATCH CIRCUIT SHIFT REGISTER LEVEL SHIFTERLATCH CIRCUIT L-SR-SVssGNDVDDL-SL-COML-SL-SL-COML-SL-SL-COML-SL-COMSTR-SR-COMR-SR-SR-COMR-SR-SR-COMR-SR-COMDATACKTC9162AF (FUNCTION/INPUT : IC30)BLOCK DIAGRAMTC9162AF (FUNCTION/INPUT : IC30)BLOCK DIAGRAMNo. 5606-3/13Top view PIN ASSIGNMENT (TOP VIEW)PinPin No.FunctionI/OHandling when unusedVFL1, 13Driver block power supply connection. (Both pins must be connected.)VDD60Logic block power supply connection. Provide a voltage between 4.5 and 5.5 V.VSS57Power supply connection. Connect to the ground.OSCI59Oscillator connection. An oscillator circuit is formed by connecting an external resistorIGNDOSCO58and capacitor to these pins.OOPENDisplay off control input.BLK61BLK = Low (VSS) . Display off. (S1 to S43 and G1 to G11 at VFLlevel.)IGNDBLK = High (VDD) . Display on.Note that serial data can be transferred while the display is turned off.CL63DI64IGNDCE62G1 to G112 to 12Digit outputs. These pins are P-channel open drain outputs with pull-down resistors.OOPENS1 to S4356 to 14Segment outputs for displaying the display data transferred by serial data input. These pinsOOPENare P-channel open drain outputs with pull-down resistors.Serial data transfer inputs. These pins must be connected to the system microcontroller.CL: Synchronization clockDI: Transfer dataCE: Chip enable BLOCK DIAGRAM VFD DRIVER IC PIN FUNCTION (LC75725E) : IC74PIN No.Pin NameI/OFunction1,12,23+VD1-Digital Power supply. Normally +2.5v2,13,24DGND-Digital Ground3AUD3OSPDIF transmitter output/Digital audio output(N.C)4WRIHost write strobe pin(connected to GND with an external resistor)5RDIHost parallel output enable pin(pulled up with an external resistor)6 CS_DA I SPI Serial data input pin7CS_CKISerial control clock input pin8EMAD7I/O9EMAD6I/O10EMAD5I/O11EMAD4I/OSerial data IN/OUTPUT pins(pulled up with an external resistor)14EMAD3I/O15EMAD2I/O16EMAD1I/O17EMAD0I/O18CS_CEIHost parallel chip select pin19SCDIO(AK_DOUT)OSerial control port data ouput pin20INTREQOControl port interrupt request output pin21EXTMEMI/OExternal Memory Chip Selector(pulled up with an external resistor)22SDATAN1(SDI)IPCM audio data input number 1 pin25SCLKN1(BICK)IPCM audio input bit clock pin26LRCLKN1(LRCK)IPCM audio input sample rate clock pin27CMPDAT(SDI)IPCM audio data input number 2 pin28CMPCLK(BICK)IPCM audio input bit clock pin29CREQ(LRCK)IPCM audio input sample rate clock pin30CLKIN(XIN)IMaster clock input(used external clock)31CLKSEL(GND)IDSP clock mode select pin: connect the GND32FILT1Connects to an external filter for the on-chip phase-locked loop33FILT1Connects to an external filter for the on-chip phase-locked loop34+2.5V-Analog Power supply for clock generator . Normally +2.5V35AGND-Analog ground supply for clock generator PLL.36RESET(CS_RST)IMaster reset input pin37DBDATA-Reserved pin and should be pulled up with an external resistor.38DBCLK-Reserved pin and should be pulled up with an external resistor.39AUD2(SDO2)OPCM multi-format digital-audio data ouput2 pin40AUD1(SDO1)OPCM multi-format digital-audio data ouput1 pin41AUD0(SDO0)OPCM multi-format digital-audio data ouput0 pin42LRCLKIAudio output sample rate clock pin43SCLK(BICK)IAudio ouput bit clock pin44MCLKIAudio master clock output pinAUDIO DSP (CS493263 - CLG : IC79)CMPDATSDATAN2CMPCLKSCLKN2CMPREQLRCLKN2SCLKN1STCCLK2LRCLKN1SDATAN1CLKINCLKSELFILTDFILTSVAAGNDDGND(3:1)VD(3:1)XMT95AUDALRCLKSCLKMCLKDCDDEXTMEM.GPIO8A800TINTERQA1,SCDINA0,SCCLKCSSTCParallel or Serial Host InterfaceRESETSCDIO,SCDOUT,PSEL,GPIO9WR,DR,EMWR,GPIO10RD,R/W,EMOE,GPIO11DATA7:0,EMAD7:0,GPIO7:0CompressedData InputInterfaceRAMProgramMemoryROMProgramMemoryRAMDataMemoryRAMOutputBufferOutputFormatterROMDataMemoryPLLClock ManagerRAM InputBuffer24-BitDSP ProcessingDigitalAudioInputInterfaceFramerShifterInputBufferControllerPIN ASSIGNMENT.(CS493263)(TOP VIEW)BlOCK DIAGRAM(CS493263)VD1DGND1AUDATA3, XMT958WR,DS,EMWR,GPIO10RD,R/W,EMOE,GPIO11A1,SCDINA0,SCCLKDATA7,EMAD7,GPIO7CS493XXX-CLG44-pin PLCCTop ViewDATA6,EMAD6,GPIO6DATA5,EMAD5,GPIO5DATA4,EMAD4,GPIO4DATA3,EMAD3,GPIO3DATA2,EMAD2,GPIO2DATA1,EMAD1,GPIO1DATA0,EMAD0,GPIO0VD2DGND2CSSCDIO,SCDOUT,PSEL,GPIO9ABOOT,INTREQEXTMEM,GPIO8SDATAN1MCLKSCLKLRCLKAUDATA0AUDATA1AUDATA2DC789101112131415161718 19 20 21 22 23 24 25 26 27 28654321 44 43 42 41 403938373635343332313029DDRESETAGNDFILT2CLKSELCLKINCMPREQ,LRCLKN2VAFILT1CMPDAT,SCLKN2,RCV958CMPCLK,SCLKN2LRCLKN1VD3SCLKN1,STCCLK2DGND3CM2054CIse Electronics Corporation:Grid AssignmentScale 3:1Unit : mmSheet 4/5G10G9G8G7G6G5G4G3G2G1G3-G10G2G1S16S15S13S12S14S17S1S2S4S6S5S8S9S11S10S3S7S7S6S2S1S3S5S4S16S15S11S10S12S14S13S18S21S3S9S15S12S6S1S19S22S4S7S13S16S10CM2054CIse Electronics Corporation:Anode & Grid AssignmentG1Sheet 5/5NL(F2)F1,F2:Filament G1-G10:GridS1-S24:Anode NP:No Pin NL:No LeadPIN ASSIGNMENTPin No.AssignmentF2NPNL S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9S8S7S6S5S4S3S2Pin No.AssignmentNLNLNLNL G10 G9G8G7G6G5G4G3G2G1NLNPF1NL(F1)S1G2G3G4G5G6G7G8G9G10S1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16S17S18S19S20S21S22S23S24S1LFES3S4SLS6S7SBLS9S10SRS12S13SBRS15S16RS18S19CS21S22LNIGHTS1S2S3S4S5S6S7S10S11S12S13S14S15S16PRESETSLEEPMULTIS1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16dBSTMEMKHzMHzLOGIC 7CMS1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16TUNEDVMAxNFS1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16TAAUTODSPS1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16RDSOSDS1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16S17ANALOG3STS1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16COAX123S1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16OPT123S1S2S3S4S5S6S7S8S9S10S11S12S13S14S15S16HDCDMP3PCM PLDDDTS12345678910111213141516171819202122232425262728293031323334353637383940414243444546 ModulatorMCLKAINLLRCKSCLKSDTODIFVCOMClock DividerAINRAGNDVADecimationFilterSerial I/OInterfaceVoltage ReferenceTTLDGNDVDTSTModulatorDecimationFilterPDNA/D CONVERTER IC (AK5380VT) : IC77 1AINRAINLVCOMNCAGNDVAVDDGNDTopView2345678TSTTTLPDNDIFSCLKMCLKLRCKSDTO161514131211109 PIN ASSIGNMENT (TOP VIEW)A/D CONVERTER IC (AK5380VT) : IC77 PIN/FUNCTIONNo.Pin NameI/ODescription1AINRIRch Analog Input Pin2AINLILch Analog Input Pin3NC-NC PinNo internal bonding.4VCOMOCommon Voltage Output PinNormally connected to AGND with a 0.1F ceramic capacitor in parallel with anelectrolytic capacitor less than 2.2F.5AGND-Analog Ground Pin, 0V6VA-Analog Power Supply Pin, +4.5+5.5V7VD-Digital Power Supply Pin, +2.7+5.5V(fs=48kHz), +4.5+5.5V(fs=96kHz)8DGND-Digital Ground Pin, 0V9SDTOOSerial Data Output PinData bits are presented MSB first, in 2s complement format.This pin is “L” in the power-down mode.10LRCKILeft/Right Channel Select PinThe fs clock is input to this pin.11MCLKIMaster Clock Input Pin12SCLKISerial Data Input PinOutput data is clocked out on the falling edge of SCLK.13PDNIPower-Down PinWhen “L”, the circuit is in power-down mode.The AK5380 should always be reset upon power-up.14DIFISerial Interface Format Pin“L”: MSB justified, “H”: I2S15TTLIDigital Input Level Select Pin“L”: CMOS level (VD=2.75.5V), “H”: TTL level (VD=4.55.5V)16TSTITest Pin (Internal pull-down pin)This pin should be left open.Note: All input pins except pull-down pins should not be left floating.A/D CONVERTER IC PIN FUNCTION (AK5380VT) : IC77SCFDACDATTDZFL1LOUT1+LOUT1-SCFDACDATTDZFR1ROUT1+ROUT1-SCFDACDATTDZFL2LOUT2+LOUT2-SCFDACDATTDZFR2ROUT2+ROUT2-SCFDACDATTDZFL3LOUT3+LOUT3-SCFDACDATTDZFR3ROUT3+ROUT3-AudioI/FControlRegisterAK4356MCLKLRCKBICKMCKOLRCKBICKXTIXTOControllerCSCCLKCDTILRCKBICKSDOUT1SDOUT2SDOUT3AC3SDTI1SDTI2SDTI3n Block DiagramLOUT1-ROUT1+1LOUT1+442DZFL23DZFR14DZFL15CAD06CAD17PDN8BICK9MCLK10DVDD11ROUT1-43LOUT2+42LOUT2-41ROUT2+40ROUT2-39LOUT3+38LOUT3-37ROUT3+36ROUT3-35AVSS34DVSS12SDTI113SDTI214SDTI315LRCK16SMUTE17CCLK18CDTI19CSN20DFS021CKS0223332313029282726252423AVDDVREFHDZFR2DZFL3DZFR3DZFEDIF2DIF1DIF0CKS2CKS1AK4356VQTop ViewD/A CONVERTER IC PIN ASSIGNMENT & BLOCK DIAGRAM PIN ASSIGNMENT (TOP VIEW)PIN/FUNCTIONNo.Pin NameI/OFunction1LOUT1-ODAC1 Lch Negative Analog Output Pin2LOUT1+ODAC1 Lch Positive Analog Output Pin3DZFL2ODAC2 Lch Zero Input Detect Pin4DZFR1ODAC1 Rch Zero Input Detect Pin5DZFL1ODAC1 Lch Zero Input Detect Pin6CAD0IChip Address 0 Pin7CAD1IChip Address 1 Pin8PDNIPower-Down & Reset Pin When “L”, the AK4356 is powered-dow