JVC-MXK35V-cs-sm维修电路原理图.pdf

SERVICE MANUAL No.21033 Nov. 2001 COPYRIGHT 2001 VICTOR COMPANY OF JAPAN, LTD. MX-K35V MX-K35V COMPACT COMPONENT SYSTEM Area suffix US - Singapore UX - Saudi Arabia Contents Safety precautions Preventing static electricity Important for laser products Disassembly method Adjustment method Flow of functional operation until TOC read 1-2 1-3 1-4 1-5 1-20 1-22 1-23 1-23 1-24 1-35 Maintenance of laser pickup Replacement of laser pickup Description of major ICs Wiring connections ACTIVE BASS EX. PHONES REPEATPROGRAMRANDOM/STOPREC STARTDUBBING REC STARTCD CLOCK /TIMER TAPE A/B DISC SKIP EJECT PLAYAREC/PLAYB CD CONTROL CD 1 CD 2 CD 3 CD-R/RW PLAYBACK FULL - LOGIC CONTROLCD SYNCHRO RECORDING EJECT R O C K C L A S S I C P O P V O L U M E SOUND MODE MAXMIN MIC RM-SMXK35V REMOTE CONTROL 123 456 789 10+10FM MODEFM /AM AUX SLEEP STANDBY/ON SOUND MODE KARAOKE RETURNSTILL NEXT V.INTROHIGHLIGHTPREV. ON SCREEN KEY CONTROLMPX ACTIVE BASS EX. FADE MUTING ECHO VOLUME PROGRAM /RANDOMREPEATTAPE A/BTAPE AUX FM/AM CD TAPE 1 BIT DUAL D/A CONVERTER COMPACT COMPONENT SYSTEM MX-K35V STANDBY/ON STANDBY SELECT VCD NUMBER TUNING KEY CONTROL RETURNPBC MIC LEVEL CANCELSET PRESET PREV NEXT 3-CD PLAY TW2111A, Reverse ; TW2121A Fast Forward and Rewind ; TW2231A 9. Test disc : CTS-1000(12cm),GRG-1211(8cm) 10. Jitter meter Measurement conditions Power supply voltage AC110/127/220/230-240V (50Hz/60Hz) : US/UX Measurement output terminal : Speaker out : TP101(Measuring for TUNER/DECK/CD) : Dummy load 6ohm Radio input signal AM modulation frequency : 400Hz Modulation factor : 30% FM modulation frequency : 400Hz Frequency displacement : 22.5kHz Frequency Range AM522kHz1629kHz (at 9kHz channel space) FM87.5MHz108MHz Standard measurement positions of volume and switch Power : Standby (Light STANDBY Indicator) A.BUSS switch: OFF Sound mode : OFF Main VOL. maximum Travers mecha set position : Disc 1 Mic MIX VOL : MAX ECHO : OFF Precautions for measurement 1. Apply 30pF and 33kohm to the IF sweeper output side and 0.082 F and 100kohm in series to the sweeper input side. 2. The IF sweeper output level should be made as low as possible within the adjustable range. 3. Since the IF sweeper is a fixed device, there is no need to adjust this sweeper. 4. Since a ceramic oscillator is used, there is no need to perform any MPX adjustment. 5. Since a fixed coil is used, there is no need to adjust the FM tracking. 6. The input and output earth systems are separated. In case of simultaneously measuring the voltage in both of the input and output systems with an electronic voltmeter for two channels, therefore, the earth should be connected particularly. 7. In the case of BTL connection amplifier, the minus terminal of speaker is not for earthing. Therefore, be sure not to connect any other earth terminal to this terminal. This system is of an OTL system. MX-K35V 1-21 Arrangement of adjusting positions Items Measurement conditions Measurement method Standard values Adjusting positions Tape recorder section Tuner section Cassette deck mechanism (Front side) Head azimuth screw (Forward side) PB Head (Deck-A) REC/PB Head (Deck-B) T1 L2 Main board CN308 L301 8-Pin Head screwHead screw Head azimuth screw (Forward side) 1.Playback the test tape VT703 (10KHz) or equivalent. 2.Adjust the head azimuth screw to obtain maximum output and both output of L / R is in 3dB. 3.Put on the screw lock paint after alignments. 1.Insert the recording tape in deck-B. 2.Starting the recording. 3.Adjust the oscillation frequency to 80KHz+/-3KHz by core of Oscillation coil of L301. Test tape : VT703 (10kHz) Measurement output terminal : Headphone Output (32-ohm loaded) or Left and Right speaker output (6-ohm loaded) Recording tape : TYPE AC-514 Measurement output terminal : Erase head terminal (CN308 8-Pin) Maximum output 80kHz+/-3kHz Head azimuth screw Adjust the head azimuth screw only when the head has been changed. Bias coil: L301 Use the High- Impedance Probe for Frequency counter input. Cassette Head Azimuth Alignments Recording Bias Frequency Alignment Items Measurement conditions Measurement method Standard values Adjusting positions OSC coil adjustment 1.Set the Signal Generator signal to 530KHz the feed to Loop Antenna. 2.Receiving the signal and the adjust the OSC coil (L2) obtain the V.T is 1.40V +/-0.05V. Antenna coil check or adjustment 1.Change the receiving frequency to 603KHz. 2.Adjust the Antenna coil ( L2 ) obtain maximum sensitivity. (Adjust the SSG output to out of AGC range.) 1.Set the receiving frequency to 531KHz. 2.Feed the 450KHz signal to AM IF input. 3.Adjust the IFT Block T1 obtain to maximum output. (Adjust the SSG output to out of AGC range.) Input signal : 530kHz Measurement point : Resistor R3 (AM) Resistor R6 (FM) Input signal : 603kHz Input signal : 531kHz V.T : 1.40V+/-0.05V Maximum sensitivity Maximum output OSC/Antenna coil : L2 Adjust the OSC coil only when the AM coil block has been changed. IFT (T1) Adjust the IFT only when the IFT block has been changed. AM Tracking Alignments AM IFT Alignments Note: The adjustment of CD section is not required. FM VT voltage measurement point R3 R6 AM VT voltage measurement point Antenna coil OSC coil MX-K35V 1-22 Flow of functional operation until TOC read Slider turns REST SW ON. Automatic tuning of TE offset Laser ON Detection of disc Automatic measurement of Focus S-curve amplitude Automatic tuning of Focus offset Disc is rotated Focus servo ON (Tracking servo ON) Automatic tuning of Tracking error balance Automatic measurement of Tracking error amplitude Automatic tuning of Focus error balance Disc to be braked to stop Tracking servo on states Tracking servo off states Disc states to rotate TOC reading finishes Automatic measurement of TE amplitude and automatic tuning of TE balance 500mv/div 2ms/divFig.1 Approx.3sec pin 14 of IC601(TEO) Approx 1.8V VREF Tracking error waveform at TOC reading Power ON Play Key Confirm that the Focus error S-cuve signal at the pin 16 of IC601 is approx.2Vp-p Confirm the waveform of the Tracking error signal. at the pin 14 of IC601 (R617) (See fig-1) Automatic tuning of Focus error gain Automatic tuning of Tracking error gain TOC reading Play a disc Confirm the eys-pattern at the lead of RFO Confirm that the voltage at the pin1 of CN602 is HLH. Check Point Check that the voltage at the pin9 of IC601 is + 5V? MX-K35V 1-23 Turn off the power switch and,disconnect the power cord from the AC OUTLET. Replace the pickup with a normal one.(Refer to Removing the CD pickup on the previous page) Plug the power cord in,and turn the power on. At this time,check that the laser emits for about 3seconds and the objective lens moves up and down. Note: Do not observe the laser beam directly. Play a disc. Check the eye-pattern. Finish. Maintenance of laser pickup (1) Cleaning the pick up lens Before you replace the pick up, please try to clean the lens with a alcohol soaked cotton swab. (2) Life of the laser diode When the life of the laser diode has expired, the following symptoms will appear. 1. The level of RF output (EFM output:ampli tude of eye pattern) will below. Is the level of RFOUT under 1.25V 0.22Vp-p? Replace it. NO YES O.K (3) Semi-fixed resistor on the APC PC board The semi-fixed resistor on the APC printed circuit board which is attached to the pickup is used to adjust the laser power.Since this adjustment should be performed to match the characteristics of the whole optical block, do not touch the semi-fixed resistor. If the laser power is lower than the specified value,the laser diode is almost worn out, and the laser pickup should be replaced. If the semi-fixed resistor would be adjusted when the pickup operates normally,the laser pickup may be damaged due to excessive current. Replacement of laser pickup MX-K35V 1-24 TMP87CM78 (IC701) : System control microprocessor 1. Terminal layout 2. Pin function SymbolI/OPin No.SymbolI/OFunction 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 VDD AB BIAS RPHD BC1 uRTS uDA uCLK MPX PER SD SCK REM KEY0 KEY1 KEY2 VER LVL SFTY TPA TPB VSS VASS VAREF VDD INH TEST XTI XTO VSS XIN XOUT RST uSTB PRT FCD FTU +5V back up supply Deck A/B select control Recording bias on/off control Deck-B head switch control Bias frequency control MPEG RTS input MPEG serial data I/O MPEG serial clock input FM stereo indicator input PLL periode output PLL serial data I/O PLL serial clock output IR remote signal input Key-0 ADC input Key-1 ADC input Key-2 ADC input Version set Level meter input Safety input Deck-A switch matrix input Deck-B switch matrix input Digita ground ADC reference ground ADC reference +5V supply +5V back up supply INH bit input Test mode / ground 32.768kHz XTal iput 32.768kHz XTal output Digita ground 8.0MHz XTal 8.0MHz XTal Reset circuit MPEG strobe input Protector input CD power supply control Tuner power supply control - O O O O I I/O I I O I/O O I I I I I I I I I I - - - I I I O - I O I I I O O 80 51 1 30 100 81 31 50 38 39 40 41 42 43 44 45 46 47 48 49 50 5163 6479 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 PCNT SHFT SMUT SPK LMUT ECHO AHB KARA VCK VDAT VOL+ VOL- VKK G13G1 P16P1 DOP DCL Reservd CLS CW CCW CNTT OPSW CLSW UPSW DWSW DCNT TPSW OPN DETA DETB MOT SOLB SOLA PBM RECM System power on/off control Clock shift output System mute cotrol output Speaker mute control output Line output mute control Echo on/off control output Active bass boost control output Karaoke mode on/off control Sound processor serial clock out Sound processor serial data out Volume up jog signal input Volume down jog signal input -35V supply VFD grid output VFD plate output MPEG door open MPEG door close Reser ved Tray close control output Tur n table CW output Tur n table CCW output Tur n table speed control Tray open detect switch input Tray close detect switch input Pickup up detect switch input Pickup down detect switch input Disc count switch input Tur n table position SW input Tray open control output Tape-A real rotation detector Tape-B real rotation detector Motor on/off control Deck-B solenoide control Deck-A solenoide control Tape playback muting control Recording mute control O O O O O O O O O O I I - O O O O - O O O O I I I I I I O I I O O O O O Pin No.Function Description of major ICs MX-K35V 1-25 ES3880FL (IC101) : MPEG decoder 1. Terminal layout 3. Pin function SymbolI/OPin No.SymbolI/OFunction 1 2 3 412 1328 29 30 31 3239 40 41 42 43 44 4549 50 51 52 53 54 5562 63 64 65 66 67 6879 80 81 VDD RAS# DWE# DA08 DBUS015 RESET# VSS VDD YUV07 VSYNC HSYNC CPUCLK PCLK2X PCLK AUX04 VSS VDD AUX6 AUX5 AUX7 LD07 LWR# LOE# LCS3# LCS1# LCS0# LA011 VSS VPP 3.3V power supply Row address strobe DRAM write enable DRAM multiplexed row and column address bus DRAM data bus System reset Ground 3.3V power supply YUV7:0 8-bit video data bus Vertical sync Horizontal sync RISC and system clock input. CPUCLK is used only if SEL_PLL1:0 = 00 to bypass PLL. Doubled 54MHz pixel clock 27MHz pixel clock Auxiliary control pins 4:0 AUX0 and AUX1 are open collectors. Ground 3.3V power supply Auxiliary control pins 6 Auxiliary control pins 5 Auxiliary control pins 7 RISC interface data bus RISC interface write enable RISC interface output enable RISC interface chip select RISC interface chip select RISC interface chip select RISC interface address bus Ground 5.0V power supply - O O O I/O I - - O I/O I/O I I/O I/O I/O - - I/O I/O I/O I/O O O O O O O - - 80 51 1 30 100 81 31 50 8287 88 89 90 91 92 93 94 95 96 97 98 99 100 LA1217 ACLK AOUT SEL_PLL0 ATCLK ATFS SEL_PLL1 DA9 DOE# AIN ARCLK ARFS TDMCLK TDMDR TDMFS CAS# VSS RISC interface address bus Master clock for external audio DAC Audio interface serial data output when selected. System and DSCK output clock frequency selection at reset time. The matrix below lists the available clock frequencies and their respective PLL bit settings. SEL_PLL1SEL_PLL0DCLK 00Bypass PLL (input mode) 0154MHz (output mode)Default 1067.5MHz (output mode) 1181.0MHz (output mode) Audio transmit bit clock Audio transmit frame sync Refer to the description and matrix for SEL_PLL0 pin 89. DRAM multiplexed row and column address line 9 DRAM output enable Audio serial data input Audio receive bit clock Audio receive frame sync TDM serial clock TDM serial data receive TDM frame sync DRAM column address strobe Ground O I/O O I I/O O I O O I I I I I I O - Pin No.Function 2. Block diagram RISC Processor Misc. Processor Interface Serial Audio Interface LA17:0 LD7:0 LCS3#, LCS#1:0 LWR# LOE# ACLK ATCLK AIN AOUT ARFS ATFS ARCLK SEL_PLL1:0 TDMCLK TDMDR TDMFS CPUCLK RESET# YUV7:0 PCLK2X PCLK VSYNC HSYNC Screen Display AUX DRAM AUX7:0 RAS# DA9:0 DBUS15:0 DOE# DWE# CAS# TDM Interface Serial Audio Interface TDM Interface Huffman Decoder 64x32 ROM 32x32 SRAM Registers DRAM Interface 2Kx32 ROM 512x32 SRAM DRAM DMA Controller On Screen Display Video Output MPEG Processor MX-K35V 1-26 ES3883F (IC102) : Companion chip 1. Terminal layout 2. Pin function SymbolI/OPin No.SymbolI/OFunction 1 24 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25,26 2730 31 32 33 34 35 36 37 38 39 40 41 42 43 VSS NC VCC DSC_C AUX0 DSC_D0 AUX1 DSC_S AUX2 DCLK EXT_CLK RESET_B AUX7/NFD_DI MUTE VCC MCLK AUX8/NFD_CLK TWS SPLL_OUT AUX9/SQSO TSD TBCK RWS SEL_PLL1 RSTOUT_B VSS NC VSS VCC RSD SEL_PLL0 AUX10/SQCK AUX11/IRQ AUX12/C2PO RBCK SER_IN AUX13/SP AUX14/SOSI AUX15/IR VSSAA VCM VREFP Ground No connect Voltage supply, 5V Clock for programming to access internal registers Servo forward or general-purpose I/O Data for programming to access internal registers Servo reverse or general-purpose I/O Strobe for programming to access internal registers Servo LDON or general-purpose I/O DCLK is the MPEG decoder clock. EXT_CLK is the external clock. EXT_CLK is an input during bypass PLL mode. Video reset (active-low) Servo BRKM/sense or general-purpose I/O / VFD_DI Audio mute Voltage supply, 5V Audio master clock Servo mute/open or general-purpose I/O / VFD_CLK TWS is the transmit audio frame sync. SPLL_OUT is the select PLL output. Servo SQSO or general-purpose I/O Transmit audio data input Transmit audio bit clock RWS is the receive audio frame sync. SEL_PLL1:0 select the PLL clock frequency for the DCLK output. SEL_PLL1SEL_PLL0DCLK 00Bypass PLL (input mode) 0127MHz (output mode) 1032.4MHz (output mode) 1140.5MHz (output mode) Reset output (active-low) Ground No connect Ground Voltage supply, 5V RSD is the receive audio data input. SEL_PLL0 and SEL_PLL1 select the PLL clock frequency for the DCLK output. Refer to the table in the definition for pin 23. Servo SQCK or general-purpose I/O ES3880 IRQ or interrupt output or general-purpose I/O CD C2PO or interrupt input or general-purpose I/O RBCK is the receive audio bit clock. SER_IN is