HarmanKardon-AVR135-avr-sm1维修电路原理图.pdf

AVR135 AVR135BK AUDIO/VIDEO RECEIVER SERVICE MANUAL 230V international version Power for the Digital Revolution. RadioFans.CN 收音机爱 好者资料库 Audio Section Stereo Mode Continuous Average Power (FTC) 50 Watts per channel, 20Hz20kHz, <0.07% THD, both channels driven into 8 ohms Six-Channel Surround Modes Power per Individual Channel Front L Amplifier is in protection mode Check speaker wire connections for shorts at receiver and light around power switch is reddue to possible shortspeaker ends Amplifier is in protection mode Contact your local Harman Kardon service center due to internal problems No sound from surround or Incorrect surround mode Select a mode other than Stereo center speakers Input is monaural There is no surround information from mono sources Incorrect configuration Check speaker mode configuration Stereo or Mono program material The surround decoder may not create center- or rear-channel information from nonencoded programs Unit does not respond to Weak batteries in remote Change remote batteries remote commands Wrong device selected Press the AVR selector Remote sensor is obscured Make certain front panel sensor is visible to remote or connect remote sensor Intermittent buzzing in tuner Local interference Move unit or antenna away from computers, fluorescent lights, motors or other electrical appliances Letters flash in the channel indicator Digital audio feed paused Resume play for DVD display and digital audio stops Check that Digital Input is selected In addition to the items shown above, additional information on troubleshooting possible problems with your AVR 135, or installation-related issues, may be found in the list of Frequently Asked Questions which is located in the Product Support section of our Web site at . 41 Processor Reset In the rare case where the units operation or the dis- plays seem abnormal, the cause may involve the erratic operation of the systems memory or microprocessor. To correct this problem, first unplug the unit from the AC wall outlet and wait at least three minutes. After the pause, reconnect the AC power cord and check the units operation. If the system still malfunctions, a sys- tem reset may clear the problem. To clear the AVR 135s entire system memory includ- ing tuner presets, output level settings, delay times and speaker configuration data, press and hold the Tone Mode Button 5 button for three seconds.The unit will turn on automatically. NOTE: Resetting the processor will erase any configu- ration settings you have made for speakers, output levels, surround modes, digital input assignments as well as the tuner presets.The unit will be returned to the factory presets, and all settings for these items must be reentered. If the system is still operating incorrectly, there may have been an electronic discharge or severe AC line interference that has corrupted the memory or microprocessor. If these steps do not solve the problem, consult an authorized Harman Kardon service center. RadioFans.CN 收音机爱 好者资料库 AMPLIFIER SECTION BIAS ADJUSTMENT CUP11651Y (BIAS PCB) Measurement condition . No input signal or volume position is minimum. Standard value. . Ideal current = 48mA ( 5%) . Ideal DC Voltage = 25.92mV ( 5%) DC VOLTMETER.Connect to CN81,CN82,CN83,CN84,CN85,CN86,CN87 NO.ChannelAdjust forAdjustment 1Front Left25.92mV (5%) VR83 CN82 VR86 2Front Right25.92mV (5%) 25.92mV (5%) 25.92mV (5%) 25.92mV (5%) VR84 CN86 VR82 3Center VR85 4Surround Left VR86 CN81 VR87 5Surround Right VR87 VR81 CN87 6 7 Surround Back Left Surround Back Right 25.92mV (5%) 25.92mV (5%) VR82 VR81(235 input or output mode selected by software; input or push-pull output. Software assignable pull-up. Alternately, P0.0-P0.7 can be used as the PG output port (PG0-PG7). D 80-73 PG0-PG7 P1.0 - P1.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. D 72-65 P2.0 - P2.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. Alternately, P2.0P2.7 can be used as I/O for TIMERA, TIMERB, D/A, SIO D,D-2 8-1 SO SI SCK DAOUT TBPWM TACK TACAP TAOUT P3.0 - P3.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. Alternately, P3.0P3.7 can be used as I/O for TIMERC0/C1, TIMER10/11 D 3023 T1CK0 T1CK1 T1CAP0 T1CAP1 T1OUT0 T1OUT1 TCOUT0 TCOUT1 RadioFans.CN 收音机爱 好者资料库 S3C84BB/F84BB PRODUCT OVERVIEW Table 1-1. S3C84BB/F84BB Pin Descriptions (80-QFP) (Continued) Pin Name Pin Type Pin Description Circuit Type Pin Number Share Pins P4.0 - P4.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. P4.0-P4.7 can alternately be used as inputs for external interrupts INT0-INT7, respectively (with noise filters and interrupt controller) D-1 38-31 INT0 INT7 P5.0 - P5.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. Alternately, P5.0P5.3 can be used as I/O for serial por, UART0, UART1, respectively. G 22-17,11-9 TxD1 RxD1 TxD0 RxD0 P6.0 - P6.7 O N-channel, open-drain output only port. F 5854,51-49 P7.0 - P7.7 I General-purpose digital input ports. Alternatively used as analog input pins for A/D converter modules. E 48-45,42-39 ADC0- ADC7 P8.0 - P8.5 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. P8.4, P8.5 can alternately be used as inputs for external interrupts INT8, INT9, respectively (with noise filters and interrupt controller) D,D-1 64-59 INT8,INT9 RadioFans.CN 收音机爱 好者资料库 PRODUCT OVERVIEW S3C84BB/F84BB Table 1-1. S3C84BB/F84BB Pin Descriptions (80-QFP) (Continued) Pin Name Pin Type Pin Description Circuit Type Pin Number Share Pins AD0 - AD7 I Analog input pins for A/D converter module. Alternatively used as general-purpose digital input port 7. E 4845 4239 P7.0P7.7 AVREF, AVSS - A/D converter reference voltage and ground - 43, 44 - RxD0, RxD1 I/O Serial data RxD pin for receive input and transmit output (mode 0) D 18, 21 P5.3, P5.1 TxD0, TxD1 O Serial data TxD pin for transmit output and shift clock input (mode 0) D 20, 22 P5.2, P5.0 TACK I External clock input pins for timer A D 3 P2.5 TACAP I Capture input pins for timer A D 2 P2.6 TAOUT O Pulse width modulation output pins for timer AD 1 P2.7 TBPWM O Carrier frequency output pins for timer B D 4 P2.4 TCOUT0 TCOUT1 O Timer C 8-bit PWM mode output or counter match toggle output pins D 24,23 P3.6,P3.7 T1CK0 T1CK1 I External clock input pins for timer 1 D 39,30 P3.0,P3.1 T1CAP0 T1CAP1 I Capture input pins for timer 1 D 28,27 P3.2,P3.3 T1OUT0 T1OUT1 O Timer 1 16-bit PWM mode output or counter match toggle output pins D 26,25 P3.4,P3.5 SI,SO,SCK I/O Synchronous SIO pins D 7,8,9 P2.1,P2.0, P2.2 RESETB I System reset pin (pull-up resistor: 240 k?)B 19 - TEST I Pull down register connected internally - 16 - VDD1, VDD2, VSS1, VSS2 - Power input pins - 12,53, 13,52 - XIN, XOUT - Main oscillator pins - 15,14 - RadioFans.CN 收音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 ? ? ? ? ? ? ? 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RadioFans.CN 收音机爱 好者资料库 S5 S1 S2 6.2dB Amp 75 dirver 6.2dB Amp 6.2dB Amp S4 S3 S6 S7 20K 20K 20K 13Vin1 V+ V- SW2SW1 Vout1 Vout2 Vout3 SW4 BLOCK DIAGAM (NJM2296M ) : IC41, 42, 43 SW3 GND SW5 Vin2 Vin3 Vin4 Vin5 1 15 11 161014 12 2 9 7 5 468 3 20K 20K 20K 20K 20K 75 dirver 75 dirver RadioFans.CN 收音机爱 好者资料库 RadioFans.CN 收音机爱 好者资料库 U-COM IC PIN ASSIGNMENT & DESCRIPTIONS PIN ASSIGNMENT (IC72) (TOP VIEW) (FPT-100P-M06) 1P20/A16 P21/A17 P22/A18 P23/A19 P24/A20/PPG0 P25/A21/PPG1 P26/A22/PPG2 P27/A23/PPG3 P30/A00/AIN0 P31/A01/BIN0 VSS P32/A02/ZIN0 P33/A03/AIN1 P34/A04/BIN1 P35/A05/ZIN1 P36/A06 P37/A07 P40/A08/SIN2 P41/A09/SOT2 P42/A10/SCK2 P43/A11 P44/A12 VCC P45/A13 P46/A14/OUT4 P47/A15/OUT5 P70/SIN0 P71/SOT0 P72/SCK0 P73/TIN0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 X0A X1A P57/CLK RST P56/RDY P55/HAK P54/HRQ P53/WRH P52/WRL P51/RD P50/ALE PA3/OUT3 PA2/OUT2 PA1/OUT1 PA0/OUT0 P97/IN1 P96/IN0 P95/PPG5 P94/PPG4 P93/FRCK/ADTG/CS3 P92/SCK1/CS2 P91/SOT1/CS1 P90/SIN1/CS0 P87/IRQ7 P86/IRQ6 P85/IRQ5 P84/IRQ4 P83/IRQ3 P82/IRQ2 MD2 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 31P74/TOT0 P75 P76 P77 AVCC AVRH AVSS P60/AN0 P61/AN1 P62/AN2 P63/AN3 Vss P64/AN4 P65/AN5 P66/AN6 P67/AN7 P80/IRQ0 P81/IRQ1 MD0 MD1 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 P17/AD15/D15 P16/AD14/D14 P15/AD13/D13 P14/AD12/D12 P13/AD11/D11 P12/AD10/D10 P11/AD09/D09 P10/AD08/D08 P07/AD07/D07 P06/AD06/D06 P05/AD05/D05 P04/AD04/D04 P03/AD03/D03 P02/AD02/D02 P01/AD01/D01 P00/AD00/D00 VCC X1 X0 VSS 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 RadioFans.CN 收音机爱 好者资料库 MB90482 PIN DESCRIPTIONS (IC72) (Continued) Pin No. Pin name Circuit type Function LQFP*1QFP*2 8082X0AOscillator pin 8183X1AOscillator pin 7880X0AA32 kHz oscillator pin 7779X1AA32 kHz oscillator pin 7577RSTBReset input pin 83 to 90 85 to 92 P00 to P07 C (CMOS) This is a general purpose I/O port. A setting in the pull-up resistance setting register (RDR0) can be used to apply pull-up resistance (RD00-RD07 = “1”) . (Disabled when pin is set for output.) AD00 to AD07 In multiplex mode, these pins function as the external address/ data bus low I/O pins. D00 to D07 In non-multiplex mode, these pins function as the external data bus low output pins. 91 to 98 93 to 100 P10 to P17 C (CMOS) This is a general purpose I/O port. A setting in the pull-up resistance setting resister (RDR1) can be used to apply pull-up resistance (RD10-RD17 = “1”) . (Disabled when pin is set for output.) AD08 to AD15 In multiplex mode, these pins function as the external address/ data bus high I/O pins. D08 to D15 In non-multiplex mode, these pins function as the external data bus high output pins. 99, 100, 1,2 1 to 4 P20 to P23 E (CMOS/H) This is a general purpose I/O port. When the bits of external address output control register (HACR) are set to 1 in external bus mode, these pins function as general purpose I/O ports. A16 to A19 When the bits of external address output control register (HACR) are set to 0 in multiplex mode, these pins function as address high output pins (A16-A19). A16 to A19 When the bits of external address output control register (HACR) are set to 0 in non-multiplex mode, these pins function as address high output pins (A16-A19). 3 to 65 to 8 P24 to P27 E (CMOS/H) This is a general purpose I/O port. When the bits of external address output control register (HACR) are set to 1 in external bus mode, these pins function as general purpose I/O ports. A20 to A23 When the bits of external address output control register (HACR) are set to 0 in multiplex mode, these pins function as address high output pins (A20-A23). A20 to A23 When the bits of external address output control register (HACR) are set to 0 in non-multiplex mode, these pins function as address high output pins (A20-A23). PPG0 to PPG3PPG timer output pins. RadioFans.CN 收音机爱 好者资料库 MB90482 (Continued) Pin No. Pin name Circuit type Function LQFP*1QFP*2 79 P30 E (CMOS/H) This is a general purpose I/O port. A00In non-multiplex mode, this pin functions as an external address pin. AIN08/16-bit up/down timer input pin (channel 0) . 810 P31 E (CMOS/H) This is a general purpose I/O port. A01 In non-multplex mode, this pin functions as an external address pin. BIN08/16-bit up/down counter input pin (channel0) . 1012 P32 E (CMOS/H) This is a general purpose I/O port. A02 In non-multiplex mode, this pin functions as an external address pin. ZIN08/16-bit up/down counter input pin (channel 0) 1113 P33 E (CMOS/H) This is a general purpose I/O port. A03 In non-multiplex mode, this pin functions as an external address pin. AIN18/16-bit up/down counter input pin (channel 1) . 1214 P34 E (CMOS/H) This is a general purpose I/O port. A04 In non-multiplex mode, this pin functions as an external address pin. BIN18/16-bit up/down counter input pin (channel 1) . 1315 P35 E (CMOS/H) This is a general purpose I/O port. A05 In non-multiplex mode, this pin functions as an external address pin. ZIN18/16-bit up/down counter input pin (channel 1) 14 15 16 17 P36, P37 D*3 (CMOS) This is a general purpose I/O port. A06, A07 In non-multiplex mode, this pin functions as an external address pin. 1618 P40 G (CMOS/H) This is a general purpose I/O port. A08 In non-multiplex mode, this pin functions as an external address pin. SIN2Simple serial I/O input pin. 1719 P41 F (CMOS) This is a general purpose I/O port. A09 In non-multiplex mode, this pin functions as an external address pin. SOT2Simple serial I/O output pin. 1820 P42 G (CMOS/H) This is a general purpose I/O port. A10 In non-multiplex mode, this pin functions as an external address pin. SCK2Simple serial I/O clock input/output pin. RadioFans.CN 收音机爱 好者资料库 MB90482 (Continued) Pin No. Pin name Circuit type Function LQFP*1QFP*2 19 20 21 22 P43, P44 F (CMOS) This is a general purpose I/O port. A11, A12 In non-multiplex mode, this pin functions as an external address pin. 2224 P45 F*4 (CMOS) This is a general purpose I/O port. A13 In non-multiplex mode, this pin functions as an external address pin. 23 24 25 26 P46, P47 F (CMOS) This is a general purpose I/O port. A14, A15 In non-multiplex mode, this pin functions as an external address pin. OUT4/OUT5Output compare event output pins. 6870 P50 D (CMOS) This is a general purpose I/O port. In external bus mode, this pin functions as the ALE pin. ALE In external bus mode, this pin functions as the address load enable (ALE) signal pin. 6971 P51 D (CMOS) This is a general purpose I/O port. In external bus mode, this pin functions as the RD pin. RD In external bus mode, this pin functions as the read strobe output (RD) signal pin. 7072 P52 D (CMOS) This is a general purpose I/O port. In external bus mode, when the WRE pin in the EPCR register is set to “1”, this pin functions as the WRL pin. WRL In external bus mode, this pin functions as the lower data write strobe output (WRL) pin. When the WRE bit in the EPCR regis- ter is set to “0”, this pin functions as a general purpose I/O port. 7173 P53 D (CMOS) This is a general purpose I/O port. In external bus mode with 16-bit bus width, when the WRE bit in the EPCR register is set to “1”, this pin functions as the WRH pin. WRH In external bus mode with 16-bit bus width, this pin functions as the upper data write