Denon-DCD710AE-cd-sm维修电路原理图.pdf

D Mute, H; Mute cancel 26P03/D3DRVMUTEOCD drive mute outputL; Mute, H; Mute cancel (Cancels above 3V) 27P04/D4INSWICD drive limit SW input 28P05/D5CLSWICD drive close SW input 29P06/D6OPSWICD drive opening SW input 30P07/D7(USB_DET) PUIReserved 31P10/D8FL_RSTOFL tube communication line (reset)P1x : Setting is possible by 1bit unit 32P11/D9FL_CSOFL tube communication line (chip selection) 33P12/D10E2P_CSOChip selection for E2PROM (Act:H) 34P13/D11MODEL SELIModel select H : 710AE / L : F107 35P14/D1214BUS0 (DSP)O*TC94A92FG bus control 36P15/D1314BUS1 (DSP)O*TC94A92FG bus control 37P16/D14BUS2 (DSP)O*TC94A92FG bus control 38P17/D1592BUS3 (DSP)O*TC94A92FG bus control 39DVSSPower supply (GND) PPower supply (GND) 40NMI PULL DOWN (0) INMI BaseModel is PULL DOWN(0). 41DVCCPower supply (+3.3V) PPower supply(+3.3V) 42P40/A0MODE0ISelect destinationP4x : Setting is possible by 1bit unit 43P41/A1MODE1ISelect destination00 : E2, 01 : E3, 10 : JP, 11 : E1C 44P42/A2LED_ROSTB is red LEDH;ON L;OFF 45P43/A3LED_GOP.ON is green LEDH;ON L;OFF 46P44/A4DAC_CSODAC1796 CS 47P45/A5(DAC_MDO)I(DAC1796 MDO) No control 48P46/A6DAC_RSTODAC1796 RST710; PD in 1M 49P47/A7MDT_DAC/DXP/ BU ODAC1796 MDI 50P50/A8MCK_DAC/DXP/ BU ODAC1796 MCKP5x : Setting is possible by 1bit unit 51P51/A9DXP_CSOChip selector for DXP6000 52P52/A10DXP_RSTOReset for DXP6000 53P53/A11BU_CSOChip selector for BU2630 54P54/A12MCK_SELOMCLK selector 55P55/A13POWEROMainTRANS on / off 56P56/A14USBRST(DSP)OReset for TMP92FD28FG 57P57/A15DECRSTOReset for TC94A92FG RESET in OR of D305 and D306 RESET in +3.3V_D 58P60/A16OPENONonP6x : Setting is possible by 1bit unit Pin No IC Terminal ameTerminal name I/O setting Terminal functionRemarks 38 DCD-710AE 59P61/A17(SRAMSTB)IReserved 60P62/A18PWR_DETIAC power OFF detection input (When it is unplugged AC : L) 61P63/A19DOUT_MUTEOMute output of digital data 62P64/A20DOUT_SELODigital data output selection 63P65/A2192SBSYIOASIS system busy inputConnection with Borelo (4) pin. 64P66/A2228INT0OReserved 65P67/A23BOOT_CONTIReserved 66P80/CS0/ TA1OUTBOOT BOOTOBOOT (for farm writing)Only the output port 67P81/CS1/TA3OUTOPENONonOnly the output port 68P82/CS25V_REG_SWOReservedOnly the output port 69P83/CS3/WAIT/ TA5OUT 92BUCK(DSP)O*TC94A92FG bus controlSchmitt input 70PD1/TB1IN0/INT592DREQ(MP3)IOASIS DREQ input(Schmitt I input) only for input 71PD2/TB1IN1/INT6/ TXD2 28TXDOFor TMP92FD28FG communication(Schmitt I input) 72AM1 PULL UP(0) IAM1 Pull UPFixed H 73X2Oscillator connection pin OOscillator connection pin 74DVSSPower supply (GND) PPower supply (GND) 75X1Oscillator connection pin IOscillator connection pin 76DVCCPower supply (+3.3V) PPower supply (+3.3V) 77RESETRESETI Reset input of -com 78AM0 PULL UP(0) IAM0 Pull UPFixed H 79P77/XT2 PULL UP(47k) ONonOpen drain output 80P76/XT192CCE(DSP)O*TC94A92FG bus controlOpen drain output R644(OPEN);GND 81DVCCPower supply (+3.3V) PPower supply (+3.3V) 82P70/RD CHECKIN(100K/ PD) IP.W.B. check modeSchmitt input and with PU resistance 83P71/SRWR CHECK1(100K/ PD) IP.W.B. check modeSchmitt input and with PU resistance 84P72/SRLLB CHECK2(100K/ PD) IP.W.B. check modeSchmitt input and with PU resistance 85P73/SRLUB CHECK3(100K/ PD) IP.W.B. check modeSchmitt input 86PD3/TB1OUT0/RXD2/ INT7 28RXDIFor TMP92FD28FG communication(Schmitt I input) 87PD4/TB1OUT1/SCLK2/ CTS2 OPENONon(Schmitt I input) 88DVSSPower supply(GND) PPower supply(GND) 89PL3/AN11/ADTRG 100KPD INonPort only for input(Schmitt ) 90PL2/AN10 100K/PD INonPort only for input(Schmitt ) 91PL1/AN9 100K/PD INonPort only for input(Schmitt ) 92PL0/AN8 100K/PD INonPort only for input(Schmitt ) 93PG7/AN7/KI7 100K/PD INonPort only for input(Schmitt )/Key on W.UP 94PG6/AN6/KI6 100K/PD INonPort only for input(Schmitt )/Key on W.UP 95PG5/AN5/KI5 100K/PD INonPort only for input(Schmitt )/Key on W.UP 96PG4/AN4/KI4 100K/PD INonPort only for input(Schmitt )/Key on W.UP 97PG3/AN3/KI3 100K/PD INonPort only for input(Schmitt )/Key on W.UP 98PG2/AN2/KI2LD_CHCKIInput for LD checkPort only for input(Schmitt )/Key on W.UP 99PG1/AN1/KI1KEY1IKEY input 1Port only for input(Schmitt )/Key on W.UP 100PG0/AN0/KI0KEY0IKEY input 10Port only for input(Schmitt )/Key on W.UP Pin No IC Terminal ameTerminal name I/O setting Terminal functionRemarks 39 DCD-710AE TMP92CD28AFG (IC15) 40 DCD-710AE TMP92CD28AFG Block Diagram TMP92CD28AFG Terminal Function Pin No IC Terminal name DCD-710AE/755SE Terminal name I/ORSTINITSTB Pull U/D Port function 1/RESETRESETTerminalIII-PUPort only for input (Schmitt input and PU resistance) 2PC0/INT0ReservedI-I-PDPort only for input (with Schmidt input) 3PC1/INT1Non (PD)I-I-PDPort only for input (with Schmidt input) 4PC2/INT2/TB1IN0/ TB0IN0 SYSTEM BUSY inputI-I-Port only for input (with Schmidt input) 5PC3/INT3STREQ inputI-I-Port only for input (with Schmidt input) 6DVCC3BPower supply (+3.3V)PPPP-Power supply (+3.3V) 7XT1Non (NC)III-Input port 8XT2Non (NC)OOI-Output port 41 DCD-710AE 9PWENon (NC)O-O-Output port 10DVSSPower supply (GND)PPPP-Power supply (GND) 11DVCC1BPower supply (+1.5V)PPPP-Power supply (+1.5V) 12RVOUT1Built-in +1.5V Regulator output O-O-Voltage output is not in the Flash version 13RVINBuilt-in +1.5V Regulator input I-I-Flash version is a terminal Power supply 14RVINBuilt-in +1.5V Regulator input I-I-Flash version is a terminal Power supply 15RVOUT2Built-in +1.5V Regulator output O-O-Voltage output is not in the Flash version 16DVCC1APower supply (+1.5V)PPPP-Power supply(+1.5V) 17DVSSPower supply (GND)PPPP-Power supply(GND) 18P00/D0Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 19P01/D1Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 20P02/D2Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 21P03/D3Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 22P04/D4Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 23P05/D5Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 24P06/D6Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 25P07/D7Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 26DVSSPower supply (GND)PPPP-Power supply (GND) 27DVCC3APower supply (+3.3V)PPPP-Power supply (+3.3V) 28P10/D8Non (NC)O-O(L)-PDP1x : Setting is poss ble by 1bit unit 29P11/D9Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 30P12/D10Non (NC)O-O(L)-P0 x : Setting is poss ble by 1bit unit 31P13/D11MODEL ID L ; F107 H ;7 10AE I-O(L)-P0 x : Setting is poss ble by 1bit unit 32P14/D12CHECK IN 100k PDO-O(L)-P0 x : Setting is poss ble by 1bit unit 33P15/D13CHECK 1 100k PDO-O(L)-P0 x : Setting is poss ble by 1bit unit 34P16/D14CHECK 2 100k PDO-O(L)-P0 x : Setting is poss ble by 1bit unit 35P17/D15CHECK 3 100k PDO-O(L)-P0 x : Setting is poss ble by 1bit unit 36P40/A0Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 37P41/A1Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 38P42/A2Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 39P43/A3Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 40P44/A4Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 41P45/A5Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 42P46/A6Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 43P47/A7Non (NC)O-O(L)-P4x : Setting is poss ble by 1bit unit 44DVSSPower supply (GND)PPPP-Power supply (GND) 45DVCC3APower supply (+3.3V)PPPP-Power supply (+3.3V) 46P50/A8Non (NC)O-O(L)-P5x : Setting is poss ble by 1bit unit 47P51/A9Non (NC)O-O(L)-P5x : Setting is poss ble by 1bit unit 48P52/A10Non (NC)O-O(L)-P5x : Setting is poss ble by 1bit unit 49P53/A11Non (NC)O-O(L)-P5x : Setting is poss ble by 1bit unit 50P54/A12Non (NC)O-O(L)-P5x : Setting is poss ble by 1bit unit 51P55/A13ReservedI-I-PUP5x : Setting is poss ble by 1bit unit 52P56/A14ReservedO-O(L)-PUP5x : Setting is poss ble by 1bit unit 53P57/A15ReservedI-I-PUP5x : Setting is poss ble by 1bit unit 54P60/A16Non (NC)O-O(L)-P6x : Setting is poss ble by 1bit unit 55P61/A17Non (PD)O-O(L)-PDP6x : Setting is poss ble by 1bit unit 56P62/A18CCEO-I-PUP6x : Setting is poss ble by 1bit unit 57P63/A19BUCKO-I-PUP6x : Setting is poss ble by 1bit unit 58P64/A20BUS0I/O-I-PUP6x : Setting is poss ble by 1bit unit 59P65/A21BUS1I/O-I-PUP6x : Setting is poss ble by 1bit unit 60P66/A22BUS2I/O-I-PUP6x : Setting is poss ble by 1bit unit 61P67/A23BUS3I/O-I-PUP6x : Setting is poss ble by 1bit unit 62DVSSPower supply (GND)PPPP-Power supply (GND) 63DVCC3APower supply (+3.3V)PPPP-Power supply (+3.3V) 64P70/RDNon (NC)O-O(L)-Port only for input (Schmitt input and PU resistance) 65P71/SRWRNon (NC)O-O(L)-Port only for input (Schmitt input and PU resistance) 66P72/SRLLBNon (PD)O-O(L)-PDPort only for input (Schmitt input and PU resistance) Pin No IC Terminal name DCD-710AE/755SE Terminal name I/ORSTINITSTB Pull U/D Port function 42 DCD-710AE 67P73/SRLUBNon (NC)O-O(L)-Port only for input (Schmitt input and PU resistance) 68P74/TA0INRESET output for TC94A92FG O-O(H ) -I/O port (Schmitt input ) 69P80/CS0/TA1OUT/ BOOT Flash writing BOOTOIO(H ) -PUPort only for input 70P82/CS2ReservedO-O(H ) -Port only for input 71P83/CS3/WAIT/ TA5OUT TC94A92FG communication LRCK O-O(H ) -I/O port 72AM1Operational mode (PU)I-I-PUPort only for input (Fixed H) 73X2Oscillator connection terminal (9.000MHz) O-O-Output port 74DVSSPower supply (GND)PPPP-Power supply (GND) 75X1Oscillator connection terminal (9.000MHz) I-I-Input port 76DVCC3APower supply (+3.3V)PPPP-Power supply (+3.3V) 77P75/USBOCUSB OC (overcurrent detection Act L) input I-I-I/O port (Schmitt input ) 78P76/USBPONNon (NC)O-O(H ) -I/O port (Schmitt input ) 79D+USB connection terminalI/O-I/O-I/O port 80D-USB connection terminalI/O-I/O-I/O port 81AM0Operation mode (PU)I-I-PUPort only for input (Fixed H) 82P77/X1USBNon (PD)O-O(H ) -I/O port (Schmitt input ) 83DVSSPower supply (GND)PPPP-Power supply (GND) 84PF0/TXD0ReservedI-I-PDI/O port (Schmitt input ) 85PF1/RXD0ReservedI-I-PDI/O port Schmitt input ) 86PF2/SCLK0/CTS0/ CLK/TB0OUT0 Non (PD)I-I-PDI/O port (Schmitt input ) 87PF3/TXD1/SPDO SYS -com communication line TXD/Flash writing TXD O-O-PUI/O port (Schmitt input ) 88PF4/RXD1/SPDI SYS -com communication line TXD/Flash writing TXD I-I-PUI/O port 89PF5/SCLK1/CTS1/ SPCLK Co-PRO RESETO-O-PUI/O port 90PN1/SDA0/TA3OUTCo-PRO communication line I2C_SDA I/O-I/O-PUI/O port (Schmitt input, open drain) 91PN2/SCL0/TA2INCo-PRO communication line I2C_SCL O-O-PUI/O port (Schmitt input, open drain) 92PN3/HSCLK/SCK1TC94A92FG communication BCK O-O-I/O port (Schmitt input ) 93PN4/HSSO/SDA1/ SO1 TC94A92FG communication DATA O-O-I/O port Schmitt input, open drain) 94PN5/HSSI/SCL1/SI1TC94A92FG communication GATE O-O-I/O port (Schmitt input, open drain) 95DVCC3APower supply (+3.3V)PPPP-Power supply (+3.3V) 96PG3/KI3Non (PD)I-I-PDPort only for input (Schmitt )/Key on W.UP 97PG2/KI2Non (PD)I-I-PDPort only for input (Schmitt )/Key on W.UP 98PG1/KI1Non (PD)I-I-PDPort only for input (Schmitt )/Key on W.UP 99PG0/KI0TC94A92FG DREQ inputI-I-PDPort only for input (Schmitt )/Key on W.UP 100DVSSPower supply (GND)PPPP-Power supply( GND) Pin No IC Terminal name DCD-710AE/755SE Terminal name I/ORSTINITSTB Pull U/D Port function 43 DCD-710AE TC94A92FG (IC17) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 44 DCD-710AE TC94A92FG Terminal Function Pin No. Symbol I/O Description DefaultRemarks 1VCoi O 3AI/F DSP VCO EFM and PLCK Phase difference signal output pin. (DSP VCO control voltage inputr pin.) O3 state output 2RVDD3 CD DSP Power supply for 3.3V RF amplifier core and PLL circuit 3SLCo O 3AI/F EFM slice level output pinO Connect capacitor according with se rvo frequency band. 4RFi I 3AI/F RF signal input pinISelectable Zin 20/10 k? 5RFRPi I 3AI/F ? ? ? ? ? I 6RFEQo O 3AI/F ? ? ? ? ? O Connect to RFRPi by 0.1uF, to RFi by 4700pF. 7DCoFC O 3AI/F RFEQo offset compensation LPF output O Connect to Vro by more than 0.015uF 8AGCi I 3AI/F ? ? ? ? ? ? I 9RFo O 3AI/F ? ? ? ? ? ? O 10RVSS3 ? ? ? ? ? ? ? and PLL circuit 11FNI2 I 3AI/F ? ? ? ? ? ? ? ? ? ? ? ? I 12FNI1 I 3AI/F ? ? ? ? ? ? ? ? ? ? ? ? I 13FPI2 I 3AI/F ? ? ? ? ? ? ? ? ? ? ? ? I 14FPI1 I 3AI/F ? ? ? ? ? ? ? ? ? ? ? ? I 15TPi I 3AI/F ? ? ? ? ? ? ? ? ? ? ? ? I 16TNi I 3AI/F ? ? ? ? ? ? ? ? ? ? ? ? I 17VRo O 3AI/F ? ? ? ? ? ? O Connected to PVREF, And connect to GNG by 0.1uF+100uF. 18AVSS3 Grounding pin for 3.3V CD analog circuits. 19MDi I 3AI/F ? ? ? ? ? I Reference Voltage=178mVtyp. 20LDo O 3AI/F ? ? ? ? ? O 45 DCD-710AE Pin No. Symbol I/O Description DefaultRemarks 21FSMoNiT O 3AI/F Focus Error signal / Sub beam add signal output pin(monitor pin/GND) O 22RFZi I 3AI/F ? ? ? ? ? ? ? I 23RFRP O 3AI/F ? ? ? ? ? O 24TEi O 3AI/F ? ? ? ? ? O Bulit in serises R=500? Connect to VRo by capacitor. 25AVDD3 Power supply pin for 3.3 V CD analog circuits. 26FOo O 3AI/F ? ? ? ? ? O Bulit in serises R=3.3 k? 27TRo O 3AI/F ? ? ? ? ? O Bulit in output R=3.3 k? 28VSS 3 Grounding pin for 1.5V Decoder DSP CD circuit 29FMo O 3AI/F ? ? ? ? ? O Bulit in output R=3.3 k? 30FMoS O 3AI/F Feed servo ? ? ? ?Stepper motor application? OBulit in output R=3.3 k? 31DMo O 3AI/F ? ? ? ? ? O Bulit in output R=3.3 k? 32VDD1 3 I/O 3I/F Power supply pin for 1.5V Decoder DSP /CD circuit 33Pio8 I/O 3I/F Port 8?General Input/Output Port ? I CMOS Port Schmitt input Refer to 1.2 Pin Assinment Table 34Pio9 I/O 3I/F Port 9?General Input/Output Port ? I CMOS Port Schmitt input Refer to 1.2 Pin Assinment Table 35Pio10 I/O 3I/F Port 10?General Input/Output Port ? I CMOS Port Schmitt input Refer to 1.2 Pin Assinment Table 36Pio11 I/O 3I/F Port 11?General Input/Output Port ? I CMOS Port Schmitt input Refer to 1.2 Pin Assinment Table 37 Pio12/ CDMoN0/ FGiN I/O 3I/F Port 12?General Input/Output Port ? / CD Monitor 0 / FG signal input I CMOS Port Schmitt input Refer to 1.2 Pin Assinment Table 38 Pio13/ CDMoN1 I/O 3I/F Port 13?General Input/Output Port