BKComponents-CT310-avr-sch维修电路原理图.pdf

CT610 - CT310CT610 - CT310 SERVICE MANUAL B&K COMPONENTS, LTD. 2100 Old Union Road Buffalo, New York 14227-2725 U.S.A. RadioFans.CN 收音机爱 好者资料库 6FKHPDWLFV6FKHPDWLFV B&K COMPONENTS, LTD. 2100 Old Union Road Buffalo, New York 14227-2725 U.S.A. RadioFans.CN 收音机爱 好者资料库 123456 A B C D 654321 D C B A Title NumberRevisionSize B Date:19-Jul-2005Sheet of File:C:BK_DataBK_ReceiversCT610_31013125c00.ddbDrawn By: SPI_Out SPI_Clock I2C_Data I2C_Clock0 Master_Clk CS_78 CS_9 CS_6 CS_45 CS_12 CS_c CS_d CS_a CS_b CS_0 CS_cf CS_de CS_f CS_ab CS_e CS_osd LED_St VFD_Clk Z8_En_a OSD_On Z8_En_b Z8_En_c Z8_En_d Z8_En_e Z8_En_f Z8_En_rf Z8_Data Z8_ClockFP_Z8_Data FP_Z8_Clk FP_IR_Data RF_Data FP_RF_Data AV_Detect SPI_In XT1 18MHz C1 30pF C2 30pF R1 1M AD0A0 AD2A2 AD1A1 AD3A3 AD4A4 AD5A5 AD6A6 AD7A7 A8A9 A8 A9A10 A10A11 A11A12 A12A13 A13A14 A14 A15 A0 A2 A1 A3 A4 A5 A6 A7 A9 A8 A10 A11 A12 A13 A0 A2 A1 A3 A4 A5 A6 A7 RD WR Ser_Busy Ser_Clk Ser_Data Program Ser_En RS232_TXD RS232_RXD Ser_Rd Ser_Wr C17 .1uF R28 100K A0 10 A1 9 A2 8 A3 7 A4 6 A5 5 A6 4 A7 3 A8 25 A9 24 A10 21 A11 23 A12 2 A13 26 A14 1 CE 20 OE 22 WE 27 D011 D112 D213 D315 D416 D517 D618 D719 VCC28 GND14 U13 32KX8SRAM A0 12 A1 11 A2 10 A3 9 A4 8 A5 7 A6 6 A7 5 A8 27 A9 26 A10 23 A11 25 A12 4 A13 28 A14 29 A15 3 CE 22 OE 24 D013 D114 D215 D317 D418 D519 D620 D721 VCC32 N/C30 A16 2 PGM31 VPP1 GND16 U14 27C1001 OC 1 C 11 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 1Q19 2Q18 3Q17 4Q16 5Q15 6Q14 7Q13 8Q12 U1274HC573 EA31 XTAL1 19 XTAL2 18 RST9 P37/RD 17P36/WR 16 P32/INT0 12 P33/INT1 13 P34/T0 14 P35/T1 15 P10/T2 1 P11/T2EX 2 P12/RXD1 3 P13/TXD1 4 P14/INT2 5 P15/INT3 6 P16/INT4 7 P17/INT5 8 P00/AD039 P01/AD138 P02/AD237 P03/AD336 P04/AD435 P05/AD534 P06/AD633 P07/AD732 P20/A821 P21/A922 P22/A1023 P23/A1124 P24/A1225 P25/A1326 P26/A1427 P27/A1528 PSEN29 ALE30 P31/TXD0 11P30/RXD0 10 VCC40 GND 20 U11 80C320-DIP A15 RD WR AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 ALE Z86_Int Sys_Clk 1 2 3U15A 74HC00 8 9 10 U15C 74HC00 A/B 1 1A 2 1B 3 2A 5 2B 6 3A 11 3B 10 4A 14 4B 13 3Y9 4Y12 E15 1Y4 2Y7 U1674HC157 If A14 and A15 are both true (physical addresses 0 xC000 - 0 xFFFF), mux the bank address into the top 3 or 4 ROM address bits. Note: A14-A16 for use with 1Mbit ROM or A14-A17 for use with 2 Mbit ROM. Else in the common area of the ROM so use A14 and A15, and force A16 & A17 to zero. 0 x0C000 0 x10000 0 x14000 0 x18000 0 x1C000 0 x2C000 Bank 3 Bank 4 Bank 5 Bank 6 Bank 7 Banks 0-2 CODE SPACE MEMORY MAP Common Area B_A0 B_A1 B_A2 PSEN 4 5 6U15B 74HC00 11 12 13 U15D 74HC00 B_A3 0 x20000 0 x24000 0 x28000 0 x34000 0 x38000 0 x3C000 Bank 8 Bank 9 Bank 10 Bank 11 Bank 12 Bank 13 Bank 14 Bank 15 0 x3FFFF 0 x30000 E_A14 E_A15 E_A16 E_A17 B_A0 B_A1 B_A2 B_A3 V+ 2 C1+ 1 C1- 3 T1O 14 T2O 7 R1I 13 GND15 VCC16 R2I 8 C2+4 C2-5 T1I11 T2I10 R1O12 R2O9 V- 6 U10 MAX232smt +C14 1uF + C16 1uF/50V + C15 1uF +C13 1uF 2 1 5 4 3 6 7 8 CON12 RJ45 +5 +5 +5+5+5 +5 +5+5 +5 +5 Ser_Clk Ser_Data Ser_Clk Ser_Busy Program Ser_Wr Ser_Rd Z86_Int Ser_En W12 +5 W9 Gnd +C21 100uF C28 .1 C29 .1 C30 .1 C31 .1 C32 .1 C33 .1 C34 .1 C35 .1 C36 .1 C37 .1 C38 .1 C39 .1 C40 .1 C41 .1 C42 .1 C43 .1 C44 .1 C45 .1 +5 R41100 +5 +5+5 R3610k +5 A01 A12 A23 VSS4 VCC 8 NC 7 SCL 6 SDA 5 U18 24C128 I2C_Clock1 I2C_Data Sys_Clk R40100 R39100 R38100 R37100 +5 + C47 1uF Cntrl_In1 Cntrl_In2 I2C_Clock1 R46 100 IR12 C46 .1 B&K 3 Zone Main Digital C 3 RJDESMSBS 13125c0d CS_3 Vcc Bd_3_Det RS232_TXD R64 2.26k +5 A01 A12 A23 VSS4 VCC 8 NC 7 SCL 6 SDA 5 U20 24C128 I2C_Clock1 I2C_Data +5 C57 .1 3 Vcc 89 Vcc 100 Vcc 12 Gnd 88 Gnd 1 Gnd 11 I/O 90 I/O 91 I/O 92 I/O 94 I/O 95 I/O 96 I/O 93 I/O_SGCK1 99 I/O_PGCK1 2 I/O 3 I/O_TD1 4 I/O_TCK 5 I/O_TMS 6 I/O 7 I/O 8 I/O 9 I/O 13 I/O 14 I/O 15 I/O 16 I/O 17 I/O 18 I/O_SGCK2 21 NC 22 Gnd 23 MODE 24 Vcc 25 NC26 I/O_PGCK227 I/O_HDC28 I/O_LDC30 I/O29 I/O31 I/O32 I/O_INIT36 Vcc37 Gnd38 I/O33 I/O34 I/O35 I/O40 I/O41 I/O42 I/O39 I/O_SGCK348 Gnd49 Done50 Vcc51 Program52 I/O53 I/O_PGCK354 I/O55 I/O57 I/O58 I/O59 I/O60 Vcc63 Gnd64 I/O61 I/O62 I/O65 I/O66 I/O67 I/O68 I/O_DIN72 I/O_DOUT73 C_Clk74 Vcc75 O_TDO 76 Gnd 77 I/O 78 I/O_PGCK4 79 I/O 80 I/O 85 I/O 81 I/O 82 I/O 83 I/O 84 XILINX Spartan XCS10 I/O 19 I/O 10 I/O 20 I/O43 I/O44 I/O45 I/O46 I/O47 I/O69 I/O70 I/O71 I/O 97 I/O 87I/O 86 I/O56 I/O 98 U17 123456 A B C D 654321 D C B A Title NumberRevisionSize B Date:28-Mar-2002Sheet of File:C:B&k_Data6_Rcvr13125b00.ddbDrawn By: 12 34 56 78 910 1112 1314 1516 1718 1920 JP11 12 34 56 78 910 1112 1314 1516 1718 1920 JP12 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP1 In_Ra In_Rb In_Rc In_Rd In_Re In_Rf In_La In_Lb In_Lc In_Ld In_Le In_Lf +8+8 -8-8 In_Va In_Vb In_Vc In_Vd In_Ve In_Vf SPI_Out I2C_DataI2C_Clock0 SPI_Clock CS_3CS_12 DetectMaster_Clk +5 AM_AntennaSPI_In 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP2 In_Ra In_Rb In_Rc In_Rd In_Re In_Rf In_La In_Lb In_Lc In_Ld In_Le In_Lf +8+8 -8-8 In_Va In_Vb In_Vc In_Vd In_Ve In_Vf SPI_Out I2C_DataI2C_Clock0 SPI_Clock CS_6CS_45 DetectMaster_Clk +5 AM_AntennaSPI_In 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP3 In_Ra In_Rb In_Rc In_Rd In_Re In_Rf In_La In_Lb In_Lc In_Ld In_Le In_Lf +8+8 -8-8 In_Va In_Vb In_Vc In_Vd In_Ve In_Vf SPI_Out I2C_DataI2C_Clock0 SPI_Clock CS_9CS_78 DetectMaster_Clk +5 AM_AntennaSPI_In 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP4 Out_Ra Out_Rb Out_Rc In_Ra In_Rb In_Rc Out_La Out_Lb Out_Lc In_La In_Lb In_Lc +8+8 -8-8 Detect OSD_Vid In_Vb In_Vc SPI_Out I2C_DataI2C_Clock1 SPI_Clock CS_a CS_cCS_b CS_0 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP5 Out_Rd Out_Re Out_Rf In_Rd In_Re In_Rf Out_Ld Out_Le Out_Lf In_Ld In_Le In_Lf +8+8 -8-8 Detect In_Vd In_Ve In_Vf SPI_Out I2C_DataI2C_Clock1 SPI_Clock CS_d CS_fCS_e CS_0 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP6 SPI_OutSPI_Clock Amp_a Amp_b Amp_c +13.4A+13.4A +5+5 CS_cfCS_ab IR01IR02 IR03IR04 IR05IR06 IR07IR08 IR09IR10 IR11IR12 Z8_En_a Z8_En_bZ8_En_c Z8_ClockZ8_Data FP_RF_Data Cntrl_In1Master_Clk VFD_Rst 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP7 SPI_OutSPI_Clock Amp_d Amp_e Amp_f +13.4B+13.4B +5+5 CS_cfCS_de IR01IR02 IR03IR04 IR05IR06 IR07IR08 IR09IR10 IR11IR12 Z8_En_d Z8_En_eZ8_En_f Z8_ClockZ8_Data FP_RF_Data Cntrl_In2Master_Clk Spare_Out +13.4B XDISPB VFD_Rst LED_K LED_A FP_IR_Data FP_Z8_Data SPI_Out FP_Z8_Clk VFD_Clk Master_Clk LED_St SPI_Clock 12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 JP8 Front Panel W4 FL2 W5 FL1 5 6 7 U1B LF353 3 2 1 84 U1A LF353 5 6 7 U2B LF353 3 2 1 84 U2A LF353 6 Zone L/R d,e,f Amp Connector 3 Zone R a, L/R c Amp Connector Amp_d Amp_e Amp_f Out_Rd Out_Re Out_Rf Out_Ld Out_Le Out_Lf Amp_a Amp_a Amp_c Out_Ra Out_Ra- Out_Rc Out_Ra Out_Ra- Out_Lc 12 34 56 78 910 1112 1314 1516 1718 1920 JP9 12 34 56 78 910 1112 1314 1516 1718 1920 JP10 6 Zone L/R a,b,c Amp Connector 3 Zone L a, L/R b Amp Connector Amp_c Amp_b Amp_a Out_Rc Out_Rb Out_Ra Out_Lc Out_Lb Out_La Amp_b Amp_a Amp_a Out_Rb Out_La- Out_La Out_Lb Out_La- Out_La R2110k R22 10k R2410k R23 10k R12 47.5 R13 47.5 +8 -8 +8 -8 Out_La Out_Ra W1 L_Head W3 R_Head W2 Gnd Out_La- Out_Ra- Q12SK371 R11 47.5 +8 C3 .1 2 1 CON10ANT_1 SPI_Out SPI_Clock CON1 3061-31 CON2 3061-31 CON3 3061-31 CON4 3061-31 CON5 3061-31 CON6 3061-31 CON7 3061-31 CON8 3061-31 CON9 3061-31 L1 22uH C4 .1 R2 475 R3 475 R4 475 R5 475 R6 475 R7 475 R10 475 R8 475 R9 475 CON11open Sel0 1 GndRF1 2 GndRF2 3 Ant 4 Vrf 5 Vbb 6 Cth 7 DataO 8 GndBB1 9 GndBB2 10 Cagc 11 Sel1 12 Osc 13 SwEn 14 U6open +5 P25 2 XTALI 7 P26 3 P27 4 VCC 5 XTALO 6 P21 16 P20 15 GND 14 P02 13 P01 12 P22 17 P23 18 P24 1 P31 8 P32 9 P00 11 P33 10 U5open +5 R14 open C6 open CR1 open C5 open R16 open R15 open Z8_ClockZ8_Data Z8_En_rf RF_Data YOUT 1 VID_IN 2 RES 3 FTR 4 AVDD 5 DVDD 6 CSYNC 7 XTAL_IN 8 XTAL_OUT 9 MUTE 10 DATA 11 CLK 12 CS 13 R 14 G 15 B 16 FB 17 CO 18 BAR 19 DGND 20 AGND 21 LECHAR 22 LESCREEN 23 COUT 24 CIN 25 VID_OUT2 26 VID_OUT1 27 YIN 28 U7STV5730A R1730.1k C8220pF C747nF R274.99k +5 C1130pF C1230pF R181k XT2 14.318Mhz C930pF C1030pF Master_Clk SPI_Out SPI_Clock CS_osd 1I/O_0 12 1I/O_1 13 2I/O_0 2 2I/O_1 1 3I/O_0 5 3I/O_1 3 1S 11 2S 10 3S 9 EN 6 1O/I 14 2O/I 15 3O/I 4 VCC 16 GND 8 VEE 7 U874HC4053 In_Va OSD_Vid OSD_On +5 I2C_Data I2C_Clock0 Master_Clk Master_Clk I2C_Data I2C_Clock0 SPI_Out SPI_Clock CS_78 CS_9 CS_6 CS_45 CS_12 CS_12 CS_6 CS_45 CS_78 CS_9 CS_c CS_d CS_a CS_b CS_0 CS_0 CS_a CS_b CS_c CS_d CS_cf CS_de CS_f CS_ab CS_e CS_e CS_f CS_ab CS_cf CS_de CS_osd CS_osd LED_St LED_St VFD_Clk VFD_Clk Z8_En_a Z8_En_a OSD_On OSD_On Z8_En_b Z8_En_b Z8_En_c Z8_En_c Z8_En_d Z8_En_d Z8_En_e Z8_En_e Z8_En_f Z8_En_f Z8_En_rf Z8_En_rf Z8_Data Z8_Data Z8_Clock Z8_Clock FP_Z8_Data FP_Z8_Data FP_Z8_Clk FP_Z8_Clk FP_IR_Data FP_IR_Data RF_Data RF_Data FP_RF_Data FP_RF_Data AV_Detect AV_Detect SPI_In SPI_In RF Remote Receiver On-Screen Display R3110k R3210k R3310k R3410k R3510k Master_Clk I2C_Data I2C_Clock0 SPI_Out SPI_Clock FP_IR_Data FP_Z8_Clk +5 R3010k R292.49k +12 W10 +8 W8 Gnd W11 -8 +C19 100uF +C20 100uF C24 .1 C26 .1 C25 .1 C27 .1 +8 -8 W16 +13.4A W17 +13.4B + C50 100uF +13.4A +13.4B + C51 100uF In_Vd In_Ve In_Vf Master_ClkMaster_Clk R445.62 R43 10k C54.1 R42 301 + 7 - 6 1 U9BLM339 + 9 - 8 14 U9CLM339 + 11 - 10 13 U9DLM339 +8 Cntrl_in1 Cntrl_In2 Cntrl_In2 Cntrl_In1 I2C_Clock1 I2C_Clock1 R4510kI2C_Clock1 IR12 IR12 C52 .1 C53 .1 B&K 3 Zone Main Connector B RJDESMSBS 13125b0c CS_3 CS_3 CR2 open R54 open R48 open R49 open R50 open R52 open R53 open R55 open R56 open R57 open R58 open R59 open R51 open In_La In_Lb In_Lc In_Ld In_Le In_Lf In_Ra In_Rb In_Rc In_Rd In_Re In_Rf +12+12+12+12 W13 +12 + C49 100uF IR01 IR02 IR03 IR04 IR05 IR06 IR07 IR08 IR09 Flasher Drivers 1A 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 GND 7 VCC 14 6A 13 6Y 12 5A 11 5Y 10 4A 9 4Y 8 U4 74HCU04 1A 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 GND 7 VCC 14 6A 13 6Y 12 5A 11 5Y 10 4A 9 4Y 8 U19 74HCU04 1A 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 GND 7 VCC 14 6A 13 6Y 12 5A 11 5Y 10 4A 9 4Y 8 U3 74HCU04 + 5 - 4 123 2 U9A LM339 +8 -8 R25 1M R19 10k R26 17.4k R20 10k +5 AV_Detect C48 .1 C56 .1 C55 .1 +5+5+5 CR4 open CR3 open 12 34 JP13 C18 .1 R47 10k Bd_3_Det Bd_3_Det Bd_3_Det R60 2.49k Z8_Clock FP_Z8_Data Z8_Data Z8_En_rf +5 R61 2.49k R62 2.49k R63 2.49k RS232_TXD RS232_TXD + C22 10uF + C23 10uF W6 Gnd W7 Gnd W14 Gnd W15 Gnd W18 Gnd W19 Gnd CON13 SINGLE_RCA 32 123456 A B C D 654321 D C B A Title NumberRevisionSize B Date:28-Mar-2002Sheet of File:C:B&k_Data6_Rcvr13125b00.ddbDrawn By: SPI_Out SPI_Clock I2C_Data I2C_Clock0 Master_Clk CS_78 CS_9 CS_6 CS_45 CS_12 CS_c CS_d CS_a CS_b CS_0 CS_cf CS_de CS_f CS_ab CS_e CS_osd LED_St VFD_Clk Z8_En_a OSD_On Z8_En_b Z8_En_c Z8_En_d Z8_En_e Z8_En_f Z8_En_rf Z8_Data Z8_ClockFP_Z8_Data FP_Z8_Clk FP_IR_Data RF_Data FP_RF_Data AV_Detect SPI_In Vcc 2 Vcc 11 Vcc 22 Gnd 1 Gnd 12 Gnd 21 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 I/O 8 I/O 9 I/O_SGCK1 10 I/O_PGCK1 13 I/O 14 I/O_TD1 15 I/O_TCK 16 I/O_TMS 17 I/O 18 I/O 19 I/O 20 I/O 23 I/O 24 I/O 25 I/O 26 I/O 27 I/O 28 I/O_SGCK2 29 NC 30 Gnd 31 MODE 32 Vcc 33 NC 34 I/O_PGCK2 35 I/O_HDC 36 I/O_LDC 37 I/O 38 I/O 39 I/O 40 I/O_INIT 41 Vcc 42 Gnd 43 I/O 44 I/O 45 I/O 46 I/O 47 I/O 48 I/O 49 I/O 50 I/O_SGCK3 51 Gnd 52 Done 53 Vcc 54 Program 55 I/O 56 I/O_PGCK3 57 I/O 58 I/O 59 I/O 60 I/O 61 I/O 62 Vcc 63 Gnd 64 I/O 65 I/O 66 I/O 67 I/O 68 I/O 69 I/O 70 I/O_DIN 71 I/O_DOUT 72 C_Clk 73 Vcc 74 O_TDO 75 Gnd 76 I/O 77 I/O_PGCK4 78 I/O 79 I/O 80 I/O 81 I/O 82 I/O 83 I/O 84 XILINX U17 S05 XT1 18MHz C1 30pF C2 30pF R1 1M AD0A0 AD2A2 AD1A1 AD3A3 AD4A4 AD5A5 AD6A6 AD7A7 A8A9 A8 A9A10 A10A11 A11A12 A12A13 A13A14 A14 A15 A0 A2 A1 A3 A4 A5 A6 A7 A9 A8 A10 A11 A12 A13 A0 A2 A1 A3 A4 A5 A6 A7 RD WR Ser_Busy Ser_Clk Ser_Data Program Ser_En RS232_TXD RS232_RXD Ser_Rd Ser_Wr C17 .1uF R28 100K A0 10 A1 9 A2 8 A3 7 A4 6 A5 5 A6 4 A7 3 A8 25 A9 24 A10 21 A11 23 A12 2 A13 26 A14 1 CE 20 OE 22 WE 27 D0 11 D1 12 D2 13 D3 15 D4 16 D5 17 D6 18 D7 19 VCC 28 GND 14 U1332KX8SRAM A0 12 A1 11 A2 10 A3 9 A4 8 A5 7 A6 6 A7 5 A8 27 A9 26 A10 23 A11 25 A12 4 A13 28 A14 29 A15 3 CE 22 OE 24 D0 13 D1 14 D2 15 D3 17 D4 18 D5 19 D6 20 D7 21 VCC 32 N/C 30 A16 2 PGM 31 VPP 1 GND 16 U14 27C1001 OC 1 C 11 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 1Q 19 2Q 18 3Q 17 4Q 16 5Q 15 6Q 14 7Q 13 8Q 12 U1274HC573 EA 31 XTAL1 19 XTAL2 18 RST 9 P37/RD 17 P36/WR 16 P32/INT0 12 P33/INT1 13 P34/T0 14 P35/T1 15 P10/T2 1 P11/T2EX 2 P12/RXD1 3 P13/TXD1 4 P14/INT2 5 P15/INT3 6 P16/INT4 7 P17/INT5 8 P00/AD0 39 P01/AD1 38 P02/AD2 37 P03/AD3 36 P04/AD4 35 P05/AD5 34 P06/AD6 33 P07/AD7 32 P20/A8 21 P21/A9 22 P22/A10 23 P23/A11 24 P24/A12 25 P25/A13 26 P26/A14 27 P27/A15 28 PSEN 29 ALE 30 P31/TXD0 11 P30/RXD0 10 VCC 40 GND 20 U11 80C320-DIP A15 RD WR AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 ALE Z86_Int Sys_Clk 1 2 3U15A 74HC00 8 9 10 U15C 74HC00 A/B 1 1A 2 1B 3 2A 5 2B 6 3A 11 3B 10 4A 14 4B 13 3Y 9 4Y 12 E 15 1Y 4 2Y 7 U1674HC157 If A14 and A15 are both true (physical addresses 0 xC000 - 0 xFFFF), mux the bank address into the top 3 or 4 ROM address bits. Note: A14-A16 for use with 1Mbit ROM or A14-A17 for use with 2 Mbit ROM. Else in the common area of the ROM so use A14 0 x0C000 0 x10000 0 x14000 0 x18000 0 x1C000 0 x2C000 Bank 3 Bank 4 Bank 5 Bank 6 Bank 7 Banks 0-2 CODE SPACE MEMORY MAP Common Area B_A0 B_A1 B_A2 PSEN 4 5 6U15B 74HC00 11 12 13 U15D 74HC00 B_A3 0 x20000 0 x24000 0 x28000 0 x34000 0 x38000 0 x3C000 Bank 8 Bank 9 Bank 10 Bank 11 Bank 12 Bank 13 Bank 14 Bank 15 0 x3FFFF 0 x30000 E_A14 E_A15 E_A16 E_A17 B_A0 B_A1 B_A2 B_A3 V+ 2 C1+ 1 C1- 3 T1O 14 T2O 7 R1I 13 GND 15 VCC 16 R2I 8 C2+ 4 C2- 5 T1I 11 T2I 10 R1O 12 R2O 9 V- 6 U10 MAX232smt +C14 1uF + C16 1uF/50V + C15 1uF +C13 1uF 2 1 5 4 3 6 7 8 CON12 RJ45 +5 +5 +5+5+5 +5 +5 +5 +5 +5 Ser_Clk Ser_Data Ser_Clk Ser_Busy Program Ser_Wr Ser_Rd Z86_Int Ser_En W12 +5 W9 Gnd +C21 100uF C28 .1 C29 .1 C30 .1 C31 .1 C32 .1 C33 .1 C34 .1 C35 .1 C36 .1 C37 .1 C38 .1 C39 .1 C40 .1 C41 .1 C42 .1 C43 .1 C44 .1 C45 .1 +5 R41100 +5 +5+5 R36 10k +5 A0 1 A1 2 A2 3 VSS 4 VCC 8 NC 7 SCL 6 SDA 5 U18 24C128 I2C_Clock1 I2C_Data Sys_Clk R40100 R39100 R38100 R37100 +5 + C47 1uF Cntrl_In1 Cntrl_In2 I2C_Clock1 R46 100 IR12 C46 .1 B&K 3 Zone Main Digital B 3 RJDESMSBS 13125b0d CS_3 Vcc Bd_3_Det RS232_TXD R64 2.26k +5 A0 1 A1 2 A2 3 VSS 4 VCC 8 NC 7 SCL 6 SDA 5 U20 24C128 I2C_Clock1 I2C_Data +5 C57 .1 3 123456 A B C D 654321 D C B A Title NumberRevisionSize B Date:28-Mar-2002Sheet of File:C:B&k_Data6_Rcvr13122b00.ddbDrawn By: 48 Y W R 12 CON2RCA_RWY_X3 48 Y W R 12 CON1RCA_RWY_X3 L3 3 LCM2 8 L4 4 LCM1 5 L5 6 L6 7 S 17 VSS 16 CLK 15 DI 14 CE 13 VEE 12 RST 18 VDD 19 L2 2 L7 9 L8 10 LCM3 11 R7 22 RCM2 23 R6 24 R5 25 RCM1 26 R4 27 R3 28 R2 29 R8 21 RCM3 20 L1 1 R1 30 U14 LC7821 L3 3 LCM2 8 L4 4 LCM1 5 L5 6 L6 7 S 17 VSS 16 CLK 15 DI 1